Constraint check results

[omega7]

Hi!

Could somebody tell me why I get the following constraint check for a XS1-L2 configuration with CAVEATS and MAYBE's?

Thanks in advance!
Martin

Code: Select all

Constraint check for node 0, core 0:
  Stack available:   00008b54,   used: 0000134c .  OKAY
  Threads available:        8,   used:        6 .  OKAY
  Timers available:        10,   used:        5 .  OKAY
  Chanends available:      32,   used:       17 .  OKAY
    Constraints checks PASSED.
Constraint check for node 0, core 0:
  Stack available:   0000fccc,   used:  unknown .  MAYBE
  Threads available:        8,   used:  unknown .  MAYBE
  Timers available:        10,   used:  unknown .  MAYBE
  Chanends available:      32,   used:  unknown .  MAYBE
    Constraints checks PASSED WITH CAVEATS.
Constraint check for node 32768, core 0:
  Stack available:   0000a528,   used: 00000e08 .  OKAY
  Threads available:        8,   used:        6 .  OKAY
  Timers available:        10,   used:        8 .  OKAY
  Chanends available:      32,   used:       27 .  OKAY
    Constraints checks PASSED.
Constraint check for node 32768, core 0:
  Stack available:   0000fcb0,   used:  unknown .  MAYBE
  Threads available:        8,   used:  unknown .  MAYBE
  Timers available:        10,   used:  unknown .  MAYBE
  Chanends available:      32,   used:  unknown .  MAYBE
    Constraints checks PASSED WITH CAVEATS.

[ale500]

Did you use any assembly code ? Because If you do, you have to set some compile-time variables (nstackwords, numchanends, and so on) so the compiler knows how much resources are used. Those vars are explained in the assembly programming manual.

[omega7]

Thanks for your reply. But no, only using XC with a little of C.
I use an XN file defining the two cores of the L2. It runs perfectly, but cannot explain the shown results for 4 cores....

Another thing which is not clear yet:
Why contains a G4 XN file (such as the XC2) one node and 4 cores, and a L2 XN file needs two separate nodes defining the two cores, and thus needs the <Links> section connecting the nodes together.

Thanks!
Martin

[Bianco]

Thanks for your reply. But no, only using XC with a little of C.

Do you use pointers?

Another thing which is not clear yet:
Why contains a G4 XN file (such as the XC2) one node and 4 cores, and a L2 XN file needs two separate nodes defining the two cores, and thus needs the <Links> section connecting the nodes together.

Thanks!
Martin

The XS1-L2 are in fact two XS1-L1 cores in one package.
Each XS1-L1 core has some links reserved to be used for multi-chip packages that is described in the XN file.

[omega7]

Bianco thanks.

Pointers? In fact, yes I have. But (I think) this does not explain why I get the results of 4 cores when only two cores are used.

I moved the code (developed on the XC-2 containing a G4) to the L2. Am I missing something? The code runs ok on the L2. Could this be a compiler or environment setting?

Regards,
Martin

[Bianco]

Bianco thanks.

Pointers? In fact, yes I have. But (I think) this does not explain why I get the results of 4 cores when only two cores are used.

I moved the code (developed on the XC-2 containing a G4) to the L2. Am I missing something? The code runs ok on the L2. Could this be a compiler or environment setting?

Regards,
Martin

You don't get the results of four cores, each result of a core is duplicated. The first one always passes, ignore that one.

I have had similar results with unsafe code moving from a single node (G4) to multiple nodes.
The duplicated results only seem to show up on multi-node. I don't think this is something to be really worried about.

[paul]

The reason for the weird MAYBE output is the fact that the mapper generates some boot code and the report for that gets output with your output.

This will be fixed to cause less confusion in the next release - but for now it is nothing to worry about!

[omega7]

Thanks all for your comments!
Looking forward for the next release.
Martin