XS1-U16 - Was reset due to the watchdog?

Technical discussions around xCORE processors (e.g. xcore-200 & xcore.ai).
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XS1-U16 - Was reset due to the watchdog?

Post by tilde7 »

I would like to test whether the reset was due watchdog.

I am using XS1-U16-128-FB217 device.

The manual in section - 13 Supervisor Logic - says:

"On boot, the program can read a register to test whether the
reset was due to the watchdog."

But I can not find any other info from that register in documentation.

So which register I must to read?


By some experimenting I read the register: XS1_SU_CFG_RST_MISC_NUM (0x50 - Reset and Mode Control:)

Command: read_node_config_reg(usb_tile, XS1_SU_CFG_RST_MISC_NUM, data);

This register has some reserved Read Only parts, which are not documented.

The result are:

- After normal shutdown (by power loss):

regVal = 0x2000

- After watchdog reset, or hardware reset signal:

regVal = 0x20000 // 2 is shifted left by 4 bits

The behaviour is tested on 2 devices.

So there is a difference in values after watchdog reset, but it is not documented, so I do not know if I can use it in every circumstances.

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Post by Ross »


Ive done some digging on this, it took some time since these devices are old and EOL.

Unfortunately it looks like the info/functionally you require is not available on these devices. There was an intent to make bits[10:8] of this register represent the "source or most recent processor reset" however, this functionally is not present.

The bits [15:11] are marked as "unused" in even the internal specifications so I'm afraid I cannot help too much as to their meaning. Bits [17:16] are the mode pins

Apologies that I could not be more useful.