I have found the bug in the AN00231_ASRC_SPDIF_TO_DAC example project.
This bug produces N*samples shift between left & right output channels after ASRC.
For example, after ASRC 48kHz->48kHz the left channel is ahead of the right one by 1 sample.
Bug fix:
in the function
void serial2block(server serial_transfer_push_if i_serial_in, client block_transfer_if i_block_transfer[ASRC_N_INSTANCES], server sample_rate_enquiry_if i_input_rate)
Code: Select all
if (chan_idx == ASRC_CHANNELS_PER_INSTANCE - 1) buff_idx++; //Move index when all channels received
Code: Select all
if (chan_idx == ASRC_CHANNELS_PER_INSTANCE) buff_idx++; //Move index when all channels received