There seem to be disparate answers as to the XMOS processor performance.
XMOS's marketing blurb here:
http://www.xmos.com/products/why/dsp
says " Examples of the DSP capability possible on a single 62.5 MIPS logical core are: "
"20 million MACs / second".
XMOS's app note:
XM000922A: Application Note: DSP performance on XS1-L device
has a "Section 3 Typical performance figures", which quotes for a 62.5 MIPS core:
" 6.25 million MACs / second " with the footnote " Architectural peformance limit " (spelling mistake of "performance" in datasheet)
Hmmm.
Also in Section 3 is the claim of 1.22kHz rate of 256-pt complex FFT on a "62.5MIPS" core, implying ~51230 core cycles per FFT. That would be over an order of magnitude slower that an embedded DSP like the TI 5500 (and twice as slow as a Cortex-M4 ARM processor).
Which data is canon?
Thanks.
# of multiply and accumulate per second
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An N MHz thread can perform N million multiplies or multiply-add
instructions per second. These are integer operations; to do some
kind of scaled integer ("fixed point") calculations you need to add
some shifting and/or rounding operations, more or fewer depending
on the ingenuity of your algorithm. You also need some instructions
to get the data in and out of your routines.
instructions per second. These are integer operations; to do some
kind of scaled integer ("fixed point") calculations you need to add
some shifting and/or rounding operations, more or fewer depending
on the ingenuity of your algorithm. You also need some instructions
to get the data in and out of your routines.