Has anyone used the reference SPI code, or had success with SPI? I am having some serious problems with this code and the SPI protocol. I had figured this would be easy, not!
I believe a problem is using "mode 3" in the XMOS code. The best guess I have is when the chip select goes low (active) and if the clock is high, then that is read as the first bit. Which is a problem with the XMOS code. That seams to be what my logic analyzer and the chip itself is saying. See the attached capture.
I told in XC to send a 3 (3 leaves the line high at the end) it is read as 0x81 by both the chip and the logic analyzer software (0x81 is what I wanted). The chip responds with 0x88, which is correct. But this is read as 0x10 in the XMOS.
This is going to take some time to nail this down. Anybody else had success with SPI?
Edited: Attached larger image
SPI Issues and questions
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SPI Issues and questions
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The solution was to hack the SPI transmit function to delay the chip select until half a bit time after the data is going out. After much analysis and testing, I did not see a way to have the XMOS use anything but "mode 3" (see wikipedia / SPI for an explanation of "modes") without bit-banging it. Curious.
Maybe this chip is some special case. Anybody have more experience?
Maybe this chip is some special case. Anybody have more experience?
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Wrote some bit-bang routines to do exactly what I expected the SPI protocol wanted, and the logic analyzer liked. Suprising easy, nice. Didn't use two precious clock blocks like the reference code, but will consume more CPU mips, when needed. Still trying to get the chip to do what I want, difficulties to be expected I guess.
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What kind of SPI transfer rates are you getting bit-banging the interface?
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Using -O0 optimization level with a for loop -> 3MHz.
I believe with a loop unroll could probably achieve 15MHz.
I don't need that much speed and my SPI lines have too much capacitiance, so I didn't take it that far.
Everything is working fine now with the bit bang routines. I attached a snapshot of the bit-banged waveforms, for anyone interested. Edited: Added the waveform capture
I believe with a loop unroll could probably achieve 15MHz.
I don't need that much speed and my SPI lines have too much capacitiance, so I didn't take it that far.
Everything is working fine now with the bit bang routines. I attached a snapshot of the bit-banged waveforms, for anyone interested. Edited: Added the waveform capture
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