Digital Down Converter
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Digital Down Converter
Has anyone implemented a Digital Down Converter (DDC) for an XMOS processor? Any thoughts on the maximum sample rate that an XMOS processor could handle while performing the DDC function?
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Do you mean a resampling with factor 1:N including reconstruction filters ?
Yes I have done that with 1:24 and 6-10:th order elliptical filters -> 90-120 dB stop band rejection.
The computational burden is well descriebed for the IIR filters, so it is not so hard to calculate.
What do you need/tolerate? One channel for one thread, or one channel for 3-5 threads (e.g. 3-5 threads with second order filters) !?
Yes I have done that with 1:24 and 6-10:th order elliptical filters -> 90-120 dB stop band rejection.
The computational burden is well descriebed for the IIR filters, so it is not so hard to calculate.
What do you need/tolerate? One channel for one thread, or one channel for 3-5 threads (e.g. 3-5 threads with second order filters) !?
Probably not the most confused programmer anymore on the XCORE forum.
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I'm interested in digitally down-converting a 5 megasamples/s (or higher, if possible) digitized RF signal (12-14 bits/sample) to produce I&Q data at 200 KHz rates. So, a 25:1 decimator with low-pass filtering, 90 dB stopband rejection would be fine.
I could tolerate using all of two (maybe three) cores, if needed, for a single channel.
I could tolerate using all of two (maybe three) cores, if needed, for a single channel.
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There is a special way of writing hi speed distributed IIR filters, but I havn't tested it IRL yet, since no-one had that type of signal (yet).ahenshaw wrote:I'm interested in digitally down-converting a 5 megasamples/s (or higher, if possible) digitized RF signal (12-14 bits/sample) to produce I&Q data at 200 KHz rates. So, a 25:1 decimator with low-pass filtering, 90 dB stopband rejection would be fine.
I could tolerate using all of two (maybe three) cores, if needed, for a single channel.
Should be great to add to the filter toolbox.
Suppose I would write it and add it to the toolbox, would you use it, or is it just an idea ?
Probably not the most confused programmer anymore on the XCORE forum.
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That's great to hear! If I can get the rates high enough, then I would definitely use it.
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I expect to give you above 10 MSamples / second one just one core !ahenshaw wrote:That's great to hear! If I can get the rates high enough, then I would definitely use it.
I will plot some examples here shortly with 90 dB OutOfBand rejection.
How much ripple in the pass-band can you tolerate ?
Probably not the most confused programmer anymore on the XCORE forum.
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Wow - that's great! I haven't fully characterized the requirements, but I'd expect 0.5 dB to be more than sufficient. Probably could go higher if it makes a big difference in speed.
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What about this one? 0.3 dB from 0-160 kHz. > -90 dB over 200 kHz.
Or this one that would run a little faster.
1 dB ripple from 0-143 kHz. If you need a wider transition band, I think I can solve that as well with 2 cores, using a double re-sampling, like 5x5
Or this one that would run a little faster.
1 dB ripple from 0-143 kHz. If you need a wider transition band, I think I can solve that as well with 2 cores, using a double re-sampling, like 5x5
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Probably not the most confused programmer anymore on the XCORE forum.
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I think the 1dB ripple would be fine. Those results look excellent.
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How wide do you think the transition band with double resampling would be? Every bit would help.