XCore Exchange

Posted: **Fri May 14, 2021 2:50 am**

I've got myself all confused while trying to study the audio example code (app_usb_aud_xk_216_mc). When I look at the schematic (xCORE-200 Multichannel Audio Platform 2V0 Hardware Manual.pdf) I can see:

X0D26 DSD_MODE
X0D27 DAC_RST_N
...
X0D33 MCLK_FSEL

X0D26:X0D33 are P8B or P4C/P4D

If I look at xk-audio-216-mc.xn I was expecting to see a definition for either of those ports but I don't see them.

So I moved onto the code to see what I could find and in gpio_access.h I find:

Code: Select all

/* General output port bit definitions */
#define P_GPIO_DSD_MODE         (1 << 0) /* DSD mode select 0 = 8i/8o I2S, 1 = 8o DSD*/
#define P_GPIO_DAC_RST_N        (1 << 1)
#define P_GPIO_USB_SEL0         (1 << 2)
#define P_GPIO_USB_SEL1         (1 << 3)
#define P_GPIO_VBUS_EN          (1 << 4)
#define P_GPIO_PLL_SEL          (1 << 5) /* 1 = CS2100, 0 = Phaselink clock source */
#define P_GPIO_ADC_RST_N        (1 << 6)
#define P_GPIO_MCLK_FSEL        (1 << 7) /* Select frequency on Phaselink clock. 0 = 24.576MHz for 48k, 1 = 22.5792MHz for 44.1k.*/

So that looks like the 8-bit port was used but I don't really see that actually defined which confuses me. So I thought I would drill down deeper and take a look at how MCLK_FSEL was used. In audiohw.xc I find:

Code: Select all

#else
    if (mClk == MCLK_441)
    {
        set_gpio(P_GPIO_MCLK_FSEL, 0);
    }
    else
    {
        set_gpio(P_GPIO_MCLK_FSEL, 1); //mClk = MCLK_48
    }

Lastly, if I follow set_gpio I just get myself more confused since I don't see how the port or tile is determined before the actual bit is set.

I'm sure I've just thoroughly confused myself and there's an easy clarification for all of (or at least I hope so). I've gone through some threads and documentation which hasn't helped so I thought someone might be nice enough to get me going down the right path.

Thanks in advance!

Posted: **Fri May 14, 2021 5:23 am**

So of course once you post something you find part of what you were missing. I see in audiohw.xc this definition:

Code: Select all

on tile[0] : out port p_gpio = XS1_PORT_8C;

Which ties together the port assignment that I assumed before but missed. I guess I incorrected also thought that your port/pin assignments needed to be in your XN file which I guess is not correct.

I still haven't figured out exactly how set_gpio works but that my lack of understanding of the assembly calls so eother another light bulb will come on for me or somebody will chime in with some help.

Posted: **Wed May 26, 2021 10:38 pm**

It looks like the port is assigned globally using p_gpio as you describe.

set_gpio reads the port directly into local variable port_shadow using peek, and then sets or clears one bit before writing the data back to the port. Software locking is used to prevent multiple threads accessing the port simultaneously.

Posted: **Thu Jun 30, 2022 3:22 am**

Ive been trying to research this topic. I dont really know where to look. ALl i kow is, if you get more people to back you up, you can get more done.



Posted: **Tue Nov 08, 2022 4:30 pm**

Some asm trickery is used to quickly share that port between cores (thread) in this old codebase. In later code bases we would user interfaces to do the same thing a bit more nicely... we're actually releasing a refreshed USB Audio codebase fairly soon.

Posted: **Fri Dec 09, 2022 5:07 pm**

Ross wrote: ↑Tue Nov 08, 2022 4:30 pm Some asm trickery is used to quickly share that port between cores (thread) in this old codebase. In later code bases we would user interfaces to do the same thing a bit more nicely... we're actually releasing a refreshed USB Audio codebase fairly soon.

Hello,
Any news about this new codebase? Will santa claus bring it ? :)

Posted: **Tue Jan 03, 2023 12:51 pm**

A pre-release is available imminently is my understanding

Posted: **Fri Jan 06, 2023 10:00 am**

Ross wrote: ↑Tue Jan 03, 2023 12:51 pm A pre-release is available imminently is my understanding

Nice, any hints where to find the pre release?

XCore Exchange

Confused on Port and Pin Assignments

Confused on Port and Pin Assignments

Re: Confused on Port and Pin Assignments

Re: Confused on Port and Pin Assignments

-

Re: Confused on Port and Pin Assignments

Re: Confused on Port and Pin Assignments

Re: Confused on Port and Pin Assignments

Re: Confused on Port and Pin Assignments