I2S/TDM Library WS/Frame Sync Clock Inconsistent
Posted: Fri Aug 02, 2019 7:08 pm
I'm connected to an external TDM microphone and interfacing with it using the I2S/TDM library.
I'm currently getting a readout of 19-24 kHz for the WS line when my MCLK and BCLK are clocked in at ~11.289MHz. I would expect to be seeing a 44.1kHz readout from the WS line and for the signal to be more consistent. I'm having trouble figuring out what would be causing this behavior.
Here's two pictures of the SDA_in line and the WS clock readouts I'm getting on my analyzer: WS and SDA readout. One image has the frame_sync set to be 32, the other to be 1.
It also looks like the SDA line sometimes sends data before the WS line gets driven high. I'm guessing this is also due to the inconsistent timing the WS is currently showing.
Since the WS line is driven by the TDM library I'm not sure how I'd go about adjusting it since I shouldn't need to modify it as I'd expect to get unintended behaviors. Is it possible the CS2100 clock is having issues causing this inconsistency or does this imply the external mic has issues since it's sending data before it receives the WS line? Also, how exactly do I configure the TDM library's sample rate, only thing I can think of is making sure the
BCLK is set to be at whatever target frequency I want and the fsync will auto be configured by the TDM library?
I'm currently getting a readout of 19-24 kHz for the WS line when my MCLK and BCLK are clocked in at ~11.289MHz. I would expect to be seeing a 44.1kHz readout from the WS line and for the signal to be more consistent. I'm having trouble figuring out what would be causing this behavior.
Here's two pictures of the SDA_in line and the WS clock readouts I'm getting on my analyzer: WS and SDA readout. One image has the frame_sync set to be 32, the other to be 1.
It also looks like the SDA line sometimes sends data before the WS line gets driven high. I'm guessing this is also due to the inconsistent timing the WS is currently showing.
Since the WS line is driven by the TDM library I'm not sure how I'd go about adjusting it since I shouldn't need to modify it as I'd expect to get unintended behaviors. Is it possible the CS2100 clock is having issues causing this inconsistency or does this imply the external mic has issues since it's sending data before it receives the WS line? Also, how exactly do I configure the TDM library's sample rate, only thing I can think of is making sure the
BCLK is set to be at whatever target frequency I want and the fsync will auto be configured by the TDM library?