XCore Exchange

When looking in the XC-1A.xn file under Nodes at the Port Location names for assigning pins to pin names i dont understand it.

For instance, Port name PORT_UART_TX is assigned pin XS1_PORT_1H, Ok??? what is XS1_PORT_1H ? why not just call it by its pin number of Core0, L4?

also, Port name PORT_UART_RX is assigned pin XS1_PORT_1I. again, why not just call it by its pin number of Core0, E12 ?

Where are these labels (XS1_PORT_1H & XS1_PORT_1I) coming from. what doc ?

See the Port Pin table in the data sheet for the XS1-G4 chip.

Leon

Thanks, but there is nothing in that table that says anything like "XS1_PORT_1H"

That's just a more meaningful name for the port than P1H0.

Leon

That's what i figured, but hows a guy to know that. Seems like i am spending so much time going nowhere with this. I dont know if i should get mad at myself for not reading volumes of information or XMOS for not having a clear cut step informative document.

If i sound pissy, dont take it personal. I am trying desperately to learn enough about this to determine if it will work for us and at the same time not become an XMOS expert.

They could explain things better in the documentation.

Leon

You won't get any arguments here.. alot of the XMOS documentation is... more of a reference. You can still "get started with it", but if you have a whole lot of patience, and don't mind reading back and forth. Alot of the important details are covered up by other information.

But, with that being said.. XMOS doesn't have a hardcore dedicated community like others. XMOS is just a wee-youngin! Once XMOS really jumps off, you'll see alot more people offering tutorials, explanations, and even their own boards! (Such as all the Arduino's)

And I'm sure when somebody from XMOS, or a more dedicated user, picks up the XMOS books or PDFs and can read it and not see any real big problems with it, but for a beginner.. it's like trying to read a book that's well above your development level.


You're not the only one! I just kept self medicating, beating myself up mentally, then I'd have another go at reading the documents. :lol: It's healthy, I swear!:D

XMOS though could do a little more to meet the average mortal closer to half way.

Hi guys,

I need to access I/O pins on XC-1A, and I am having roughly the same problem...

I am very new at this, so forgive me if my questions are terribly stupid... But I really am getting desperate!

First of all I wanted to ask if it is OK to use P1A0 and P1B0 pins for my I/O - in the hardware manual, at the SPI Flash Memory section, it says that they are provided for accessing flash memory, so I would assume I can't use them as "serial I/O ports"? Nothing is mentioned at the I/O Expansion Areas section, they are just listed as normal 1b ports... And the other question is - in the table (on page 8) with mapping between pins and ports, several pins are assigned the same name (e.g. X1D2, X2D2 and X3D3 all map to P4A0).

My other question is whether I can "divide" a port and use e.g. X1D2 and X1D3 separately (actually one for input and one for output)?

Thanks!

Hi Almost,

I'm going to take you through the whole connectivity. Most of which you'll have already gathered, but by bringing it together hopefully it'll become clearer.

The XC-1A has an XS1-G4 device on it. The XS1-G4 has 4 separate XCores on it (XCore0-3). Each XCore has 71 pins which connect to XCore ports (XnD0-70). XCore0's pin 15 is named X0D15, XCore 2's pin 10 is named X2D10.

The XCore controls it's output pins by using its 'ports'. There are a number of ports on the XCore with different widths (1, 4, 8, 16 and 32). Each port pin is not uniquely mapped to an XCore pin. So for instance XnD4 (the D4 pin on all 4 XCores) is mapped to the 4bit port B's bit 0, the 8bit port A's bit2 and the 16 bit port A's bit2. See page 15 on the XC-1A Hardware Manual. Obviously they can't all be connected at the same time, so you need to make sure you're only using one of these overlapping ports at a time.

Looking at the XC-1A Hardware Manual p15, you can see where the various port pins from the four XCores are wired to. On XCore0 4 of the pins are used for the SPI flash connection (X0D0, X0D1, X0D10 and X0D11). Other XCore 0 pins are connected to buttons and LEDs. Some of XCore0's pins are connected to the prototyping area. The I/O expansion areas have pins XnD0-11 from XCores1-3 connected to them and X3D12-23 to X3PortB (also see p8)

So in response to your initial question. Only XCore0's P1A0 and P1B0 pins (X0D0 & X0D1) are used for SPI. P1A0 and P1B0 for all the other 3 XCores are brought out to the expansion area and you can use them for your application.

Can you 'divide' a port for separate tasks? No not really. If pins have different uses they should be connected to different ports. If your signal is not a bus, use a 1 bit port. So you can use P1C0 and P1D0 for separate tasks. However if you have a byte wide data bus, use an 8 bit port for that like P8A(0-7).

Hopefully this helps.