XVF-3510 development and USB device

Technical questions regarding the XTC tools and programming with XMOS.
Kevin Jordan
Member++
Posts: 22
Joined: Fri May 22, 2020 5:52 pm

Post by Kevin Jordan »

As far as I know, the clock is powered by 3v3. The picture I have with the Rigol Scope has the measurement cursors manually placed, and show 5v, but the swing in the +/- of the scope is 3v3.

Here is the updated Schematic, if you wouldn't mind taking a look. I still haven't been able to program the QSPI Flash, and I haven't seen a pulse out on the clock pin yet. I'm going to spin some boards with extended pins on the QFN another 0.5mm so I'll be able to easily hand solder them. I also brought out more pins as test pins so if I do need to modify, it should be easier.

I really appreciate all your help with this. Don't think I could have gone this far without your help.
Attachments
Mycroft - Mark 2.pdf
v0.66 of MyCroft Schematic
(968.54 KiB) Downloaded 144 times
Mycroft - Mark 2.pdf
v0.66 of MyCroft Schematic
(968.54 KiB) Downloaded 144 times


User avatar
mon2
XCore Legend
Posts: 1913
Joined: Thu Jun 10, 2010 11:43 am
Contact:

Post by mon2 »

I am still concerned about the amplitude of the 24 MHz clock on your custom board.

If you place your scope probe on the XMOS kit clock, note the top and bottom of the wave form.

Then repeat on your kit.

Do you feel they are the same heights?

What is the bandwidth of your scope?

Each of these clock oscillator pulses should be text book square waves but suspecting that the bandwidth of the scope is being taxed.

Is it one of the models where the bandwidth can be hacked to be higher?

The fact that xtag3 can ping the XMOS CPU and it's identify of # of cores implies that the metal center pad is connected. That is a logical conclusion at this time.

If practical, borrow the clock out from the XMOS kit with a common ground and apply to your PCB. Turn off your clock by shorting pin #1 of your clock to ground or remove it completely. Power up Xmos and your board to test.

No sweat on the help, junior is hogging our main tv for his PS4 so deprived of Netflix viewing tonight.

The Rain and Trapped will have to wait..
Kevin Jordan
Member++
Posts: 22
Joined: Fri May 22, 2020 5:52 pm

Post by Kevin Jordan »

I wish we had some rain. It hasn't rained since April here. I tried putting down another XMOS chip on a fresh board, and I keep shorting 1v0 to GND. I changed the pad layout to be much smaller, and sent it off to the printer with the updated changes.

I tried multiple fresh boards, with fresh XMOS chips. The new layout will have a much better hand solderable QFN pin. I hope to have the boards, by this time next week. My wheels are constantly spinning trying to deal with the bad seating of the QFNs, I think this will be much better.
User avatar
mon2
XCore Legend
Posts: 1913
Joined: Thu Jun 10, 2010 11:43 am
Contact:

Post by mon2 »

The PCB should be designed with the industry recommended PCB landing pads and sizes. Xmos offers the suggested footprints for the component. Often called IPC specifications. Our PCB designer follows the same proven guidelines.

This way, when a SMD stencil is used to deposit the solder paste, the proper solder paste volume will be used and melt inside the reflow oven for the best soldered contacts on the device.

We recently started to use our smd assembly line and it has been a learning curve but now can assemble pcbs in seconds but takes quality time to setup and train.

Ironically, we use JLCPCB for our low density pcbs and stencils. They are very affordable.

If practical, share the PCB layout to see if we can offer any comments. If you are not comfortable with PCB layouts , there are many offshore designers available under contract.
Kevin Jordan
Member++
Posts: 22
Joined: Fri May 22, 2020 5:52 pm

Post by Kevin Jordan »

The project is opensource, I just uploaded the newest files to the github here:

https://github.com/MycroftAI/hardware-m ... Rpi-devkit

You can checkout the KiCAD files directly, or the the gerber files (this is v0.66)

I think the issue I had on the QFN on the last run was that I was had some 1v0 under the pad to connect the many 1v0 line pins. I removed that for this run.
Kevin Jordan
Member++
Posts: 22
Joined: Fri May 22, 2020 5:52 pm

Post by Kevin Jordan »

New boards are back! I was easily able to place the XMOS QFN IC on the board without shorts, and start it up with my new sequencer and it connected!

And after re-soldering a couple lines on the QFN, it flashed!!!!!

Code: Select all

bash-3.2$ xflash --list-devices --verbose
XFlash_Options::ListDevices : xgdb --batch -q --ex listdevices

Available XMOS Devices
----------------------

  ID	Name			Adapter ID	Devices
  --	----			----------	-------
  0 	XMOS XTAG-3         	2KbYj_za	O[0]

bash-3.2$ xflash --no-compression --boot-partition-size 1048576 --factory bin/app_xvf3510_ua_v4_0_0.xe --data data-partition/images/data_partition_factory_ua_v4_0_0.bin --verbose
XFlash_Options::ListDevices : xgdb --batch -q --ex listdevices devl-4ece9027
XFlash_Application found _start :40000 on Node 0
XFlash_Application found _DoSyscall :52190 on Node 0
XFlash_Application found _DoException :400a4 on Node 0
XFlash_Application found _start :40000 on Node 0
XFlash_Application found _DoSyscall :534cc on Node 0
XFlash_Application found _DoException :400a4 on Node 0
XFlash::DoXFlash
XFlash::DoImageProgramming
XFlash::GetDeviceInfo
XFlash_DeviceInfo::GetDeviceInfo_SQI
XFlash::BuildFlashBinaryFile
XFlash_Builder_S2L::BuildStage2Loaders Factory
xflash: Warning: F03148 --quad-spi-clock not given, using default 15.62MHz
Stage2_Loader::Compile : xcc -Wno-bidirectional-buffered-port -Xmapper --dontenablesodlinks -Xmapper --nochaninit -Xmapper --noinitialtidy -Xmapper --image-base -Xmapper 0x40080 -Xmapper --image-size -Xmapper 0x3ff80 -Xmapper --wno110 -Xmapper --wno226 -Xmapper --wnoXN -std=c99 -O2 -x xn "target-xn-v0-40686c8a" -x xc s2l-n0-00693dcd -lstage2loader -lswitchsetup -lsqiaccess -lquadspi -llocks -o s2l-n0-c5e44334
Stage2Loader found _DoSyscall : 0x404c8 on Node 0
Stage2Loader found _DoException : 0x40124 on Node 0
Stage2_SwitchSetup::Compile : xcc -c -march=xs2a -x assembler-with-cpp swstup-n0v0-73f2fddf -o swstup-n0v0-ceb2d161
Stage2_SwitchSetup::Compile : xcc -nostartfiles -Wno-bidirectional-buffered-port -Xmapper --first -Xmapper swstup-n0v0-ceb2d161 -Xmapper --dontenablesodlinks -Xmapper --nochaninit -Xmapper --noinitialtidy -Xmapper --wno110 -Xmapper --wno226 -Xmapper --wnoXN -std=c99 -O2 -x xn "target-xn-v0-40686c8a" -x xc swstup-n0v0-bc61e5b8 -lswitchsetup -o swstup-n0v0-d12ae4dc
XFlash_Builder_Image::BuildImages Factory
XFlash_Builder_Image::BuildImageTable
  master node = 0
    node = 0
XFlash_Builder_Image::BuildImageTable num cores for image table = 2
XFlash_Builder_Image::CalculateBufferSize Starting calculation _total_image_size=0
XFlash_Builder_Image::CalculateBufferSize Add Image Header _total_image_size=34
XFlash_Builder_Image::CalculateBufferSize Add Switch Setup header _total_image_size=3c
XFlash_Builder_Image::CalculateBufferSize Add Per Core header _total_image_size=54
XFlash_Builder_Image::CalculateBufferSize_SwitchSetup _total_image_size=7ac
XFlash_Builder_Image::CalculateBufferSize_Application application size = 161a4 _total_image_size = 16950
XFlash_Builder_Image::CalculateBufferSize_Application application size = 19ff4 _total_image_size = 30944
XFlash_Builder_Image::BuildImageTable allocated image buffer size = 30944
XFlash_Builder_Image::WriteBuffer_ImageHeader
XFlash_Builder_Image::WriteBuffer_SwitchSetup current switch setup table offset : 34
XFlash_Builder_Image::WriteBuffer_SwitchSetup current application data offset : 54
XFlash_Builder_Image::WriteBuffer_SwitchSetup size : 754
XFlash_Builder_Image::WriteBuffer_SwitchSetup aligned_size : 758
XFlash_Builder_Image::WriteBuffer_SwitchSetup init_vec_shift : 0
XFlash_Builder_Image::WriteBuffer_Application
XFlash_Builder_Image::WriteBuffer_Application for node : 0
XFlash_Builder_Image::WriteBuffer_Application for core : 0
XFlash_Builder_Image::WriteBuffer_Application current core table offset : 3c
XFlash_Builder_Image::WriteBuffer_Application current application data offset : 7ac
XFlash_Builder_Image::WriteBuffer_Application size : 161a0
XFlash_Builder_Image::WriteBuffer_Application aligned_size : 161a4
XFlash_Builder_Image::WriteBuffer_Application init_vec_shift : 0
XFlash_Builder_Image::WriteBuffer_Application chan end : 80020002
XFlash_Builder_Image::WriteBuffer_Application for core : 1
XFlash_Builder_Image::WriteBuffer_Application current core table offset : 48
XFlash_Builder_Image::WriteBuffer_Application current application data offset : 16950
XFlash_Builder_Image::WriteBuffer_Application size : 19ff0
XFlash_Builder_Image::WriteBuffer_Application aligned_size : 19ff4
XFlash_Builder_Image::WriteBuffer_Application init_vec_shift : 0
XFlash_Builder_Image::WriteBuffer_Application chan end : 80030002
XFlash_Builder_Image::WriteBuffer_CRC
XFlash_Builder_Binary::BuildBinary
XFlash_Builder_Binary::CalculateBufferSize_Factory
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding s2l size word (4)4
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding s2l app (1620) 1624
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding s2l crc (4)1628
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding factory app (30944) 31f6c
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding sector padding (94) 32000
XFlash_Builder_Binary::CalculateBufferSize_Factory : First User Sector offset = 32000
XFlash_Builder_Binary::GetSearchLimitPadding : current size (32000) ce000
XFlash_Builder_Binary::CalculateBufferSize_Data
XFlash_Builder_Binary::CalculateBufferSize_Data : Adding file data (3000) 103000
XFlash_Builder_Binary::BuildBinary : Allocating buffer - 103000
XFlash_Builder_Binary::GetSearchLimitPadding : current size (32000) ce000
XFlash_Builder_Binary::WriteBufferToBinary : flash_bin_node0
XFlash_Programmer_Program::DoProgram
XFlash_Programmer_Program::GenerateSource
XFlash_Programmer_Program::IssueCompileCommand :xcc -w -Xmapper --dontenablesodlinks -O2 -lquadspi -x xc "fp-fbf03301" -x xn "target-xn-v0-40686c8a" -D VERBOSE=1 -D MONITOR=1 -D ERASE_ALL_FIRST=1 -o "fp-3704f006"
XFlash_Utils::BuildRunCommand : xrun --io fp-3704f006 
Site 0 has finished successfully.        
XFlash_Programmer_Program::IssueResetCommand : xgdb --batch-silent --ex connect --ex reset mode-pins nointerrupt --ex q 

I didn't need to pull down the D1 on the Flash.


It even worked on the binary!!! Yay!!!

Code: Select all

bash-3.2$ xflash --id 0 "XM-013830-SM-F-XVF3510 Adaptive USB Firmware binary.xe" --verbose
XFlash_Application found _start :40000 on Node 0
XFlash_Application found _DoSyscall :4e9f0 on Node 0
XFlash_Application found _DoException :400a4 on Node 0
XFlash_Application found _start :40000 on Node 0
XFlash_Application found _DoSyscall :4e214 on Node 0
XFlash_Application found _DoException :400a4 on Node 0
XFlash_Application : Attempting to Compress Binary Data
libcompressor marker 1=181
libcompressor marker 2=165
libcompressor marker 3=91
libcompressor best marker length 3 2 2 
libcompressor best marker length 3 2 3 
libcompressor best marker length 3 2 4 
libcompressor best marker length 3 2 5 
libcompressor best marker length 3 2 6 
libcompressor DoCompression_Compress took : 1931ms
libcompressor compile command=xcc -nostartfiles -Xmapper --bootstyle=forsim -x assembler-with-cpp "decompressor-deaa9480" -x xn "target-xn-v0-ddbf784b" -o decompressor-08c7da1d
libcompressor validating decompressor decompressor-08c7da1d
libcompressor launching simulator decompressor-08c7da1d --disable-syscalls --max-cycles 100000000
libcompressor simulator starting @0x40000
libcompressor simulator terminate @0x7ff58
libcompressor decompressor validated
XFlash_Application on Node : 0 compressed from : 76928 bytes to : 47532 bytes (38.21%)
libcompressor marker 1=107
libcompressor marker 2=181
libcompressor marker 3=219
libcompressor best marker length 3 2 2 
libcompressor best marker length 3 2 3 
libcompressor DoCompression_Compress took : 4030ms
libcompressor compile command=xcc -nostartfiles -Xmapper --bootstyle=forsim -x assembler-with-cpp "decompressor-5d8790cb" -x xn "target-xn-v0-ddbf784b" -o decompressor-900a6883
libcompressor validating decompressor decompressor-900a6883
libcompressor launching simulator decompressor-900a6883 --disable-syscalls --max-cycles 100000000
libcompressor simulator starting @0x40000
libcompressor simulator terminate @0x7ff58
libcompressor decompressor validated
XFlash_Application on Node : 0 compressed from : 82972 bytes to : 62636 bytes (24.51%)
XFlash::DoXFlash
XFlash::DoImageProgramming
XFlash::GetDeviceInfo
XFlash_DeviceInfo::GetDeviceInfo_SQI
XFlash::BuildFlashBinaryFile
XFlash_Builder_S2L::BuildStage2Loaders Factory
xflash: Warning: F03148 --quad-spi-clock not given, using default 15.62MHz
Stage2_Loader::Compile : xcc -Wno-bidirectional-buffered-port -Xmapper --dontenablesodlinks -Xmapper --nochaninit -Xmapper --noinitialtidy -Xmapper --image-base -Xmapper 0x40080 -Xmapper --image-size -Xmapper 0x3ff80 -Xmapper --wno110 -Xmapper --wno226 -Xmapper --wnoXN -std=c99 -O2 -x xn "target-xn-v0-ddbf784b" -x xc s2l-n0-a5c74a0e -lstage2loader -lswitchsetup -lsqiaccess -lquadspi -llocks -o s2l-n0-9d4e702c
Stage2Loader found _DoSyscall : 0x404c8 on Node 0
Stage2Loader found _DoException : 0x40124 on Node 0
Stage2_Loader : Attempting to Compress Binary Data
libcompressor marker 1=77
libcompressor marker 2=125
libcompressor marker 3=181
libcompressor best marker length 3 2 2 
libcompressor best marker length 3 2 3 
libcompressor best marker length 3 2 4 
libcompressor best marker length 3 2 5 
libcompressor best marker length 4 2 5 
libcompressor DoCompression_Compress took : 133ms
libcompressor compile command=xcc -nostartfiles -Xmapper --bootstyle=forsim -x assembler-with-cpp "decompressor-fa23b98a" -x xn "target-xn-v0-ddbf784b" -o decompressor-428d4def
libcompressor validating decompressor decompressor-428d4def
libcompressor launching simulator decompressor-428d4def --disable-syscalls --max-cycles 100000000
libcompressor simulator starting @0x40000
libcompressor simulator terminate @0x7feda
libcompressor decompressor validated
Stage2_Loader on Node : 0 compressed from : 5536 bytes to : 4248 bytes (23.27%)
Stage2_SwitchSetup::Compile : xcc -c -march=xs2a -x assembler-with-cpp swstup-n0v0-1d606665 -o swstup-n0v0-a8e5499c
Stage2_SwitchSetup::Compile : xcc -nostartfiles -Wno-bidirectional-buffered-port -Xmapper --first -Xmapper swstup-n0v0-a8e5499c -Xmapper --dontenablesodlinks -Xmapper --nochaninit -Xmapper --noinitialtidy -Xmapper --wno110 -Xmapper --wno226 -Xmapper --wnoXN -std=c99 -O2 -x xn "target-xn-v0-ddbf784b" -x xc swstup-n0v0-9b014d77 -lswitchsetup -o swstup-n0v0-8f18b20c
XFlash_Builder_Image::BuildImages Factory
XFlash_Builder_Image::BuildImageTable
  master node = 0
    node = 0
XFlash_Builder_Image::BuildImageTable num cores for image table = 2
XFlash_Builder_Image::CalculateBufferSize Starting calculation _total_image_size=0
XFlash_Builder_Image::CalculateBufferSize Add Image Header _total_image_size=34
XFlash_Builder_Image::CalculateBufferSize Add Switch Setup header _total_image_size=3c
XFlash_Builder_Image::CalculateBufferSize Add Per Core header _total_image_size=54
XFlash_Builder_Image::CalculateBufferSize_SwitchSetup _total_image_size=7ac
XFlash_Builder_Image::CalculateBufferSize_Application application size = b9b0 _total_image_size = c15c
XFlash_Builder_Image::CalculateBufferSize_Application application size = f4b0 _total_image_size = 1b60c
XFlash_Builder_Image::BuildImageTable allocated image buffer size = 1b60c
XFlash_Builder_Image::WriteBuffer_ImageHeader
XFlash_Builder_Image::WriteBuffer_SwitchSetup current switch setup table offset : 34
XFlash_Builder_Image::WriteBuffer_SwitchSetup current application data offset : 54
XFlash_Builder_Image::WriteBuffer_SwitchSetup size : 754
XFlash_Builder_Image::WriteBuffer_SwitchSetup aligned_size : 758
XFlash_Builder_Image::WriteBuffer_SwitchSetup init_vec_shift : 0
XFlash_Builder_Image::WriteBuffer_Application
XFlash_Builder_Image::WriteBuffer_Application for node : 0
XFlash_Builder_Image::WriteBuffer_Application for core : 0
XFlash_Builder_Image::WriteBuffer_Application current core table offset : 3c
XFlash_Builder_Image::WriteBuffer_Application current application data offset : 7ac
XFlash_Builder_Image::WriteBuffer_Application size : b9ac
XFlash_Builder_Image::WriteBuffer_Application aligned_size : b9b0
XFlash_Builder_Image::WriteBuffer_Application init_vec_shift : 0
XFlash_Builder_Image::WriteBuffer_Application chan end : 80020002
XFlash_Builder_Image::WriteBuffer_Application for core : 1
XFlash_Builder_Image::WriteBuffer_Application current core table offset : 48
XFlash_Builder_Image::WriteBuffer_Application current application data offset : c15c
XFlash_Builder_Image::WriteBuffer_Application size : f4ac
XFlash_Builder_Image::WriteBuffer_Application aligned_size : f4b0
XFlash_Builder_Image::WriteBuffer_Application init_vec_shift : 0
XFlash_Builder_Image::WriteBuffer_Application chan end : 80030002
XFlash_Builder_Image::WriteBuffer_CRC
XFlash_Builder_Binary::BuildBinary
XFlash_Builder_Binary::CalculateBufferSize_Factory
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding s2l size word (4)4
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding s2l app (1118) 111c
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding s2l crc (4)1120
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding factory app (1b60c) 1c72c
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding sector padding (8d4) 1d000
XFlash_Builder_Binary::CalculateBufferSize_Factory : First User Sector offset = 1d000
XFlash_Builder_Binary::GetSearchLimitPadding : current size (1d000) 0
XFlash_Builder_Binary::CalculateBufferSize_Data
XFlash_Builder_Binary::BuildBinary : Allocating buffer - 1d000
XFlash_Builder_Binary::GetSearchLimitPadding : current size (1d000) 0
XFlash_Builder_Binary::WriteBufferToBinary : flash_bin_node0
XFlash_Programmer_Program::DoProgram
XFlash_Programmer_Program::GenerateSource
XFlash_Programmer_Program::IssueCompileCommand :xcc -w -Xmapper --dontenablesodlinks -O2 -lquadspi -x xc "fp-da964c36" -x xn "target-xn-v0-ddbf784b" -D VERBOSE=1 -D MONITOR=1 -D ERASE_ALL_FIRST=1 -o "fp-5fbe64cd"
XFlash_Utils::BuildRunCommand : xrun --io --id 0 fp-5fbe64cd 
Site 0 has finished successfully.        
XFlash_Programmer_Program::IssueResetCommand : xgdb --batch-silent --ex connect --id 0 --ex reset mode-pins nointerrupt --ex q 
bash-3.2$ 
These boards are much more promising! Yay!!!!! Thanks for all your help!!!
deckrdshaw
Newbie
Posts: 1
Joined: Sat Sep 26, 2020 11:08 am

Post by deckrdshaw »

The XTAG3 is also open-drain so the outputs can be shared. Correction: My bad - DO NOT do this. The XMOS kits feature yet another open drain buffer and THEN you can share the outputs. For now, use the idea of manually shorting the #RESET to ground to pulse the reset line. The proper design should have another open drain buffer from the XTAG3 tool as shown in the XMOS ref kits.

Test again to see if this changes the test results with your custom PCBA.

Other areas to review...

1) What is the measured voltage for your 1v0 rail? What are the exact stuffed values for R3 & R4 (Vfb resistors)? This buck regulator is marked as NRND.

2) As a general rule, the voltage sequencing is very important to prevent possible latch up of the CPU. The guidelines in the datasheet recommend:

a) monitor the +3v3 rail with a voltage supervisor -> once this threshold is met, use the PG signal from this 3v3 supervisor to enable the +1v0 rail.
b) monitor the +1v0 rail with a voltage supervisor -> once this threshold is met, use the PG signal from this +1v0 supervisor to release the #RESET of the CPU.

For the above reasons, suggest to rework the +3v3 voltage supervisor (U12) to enable the +1v0 buck regulator (not the #RESET signal).

Then add another +1v0 supervisor that can trigger @ 0.9v to release the #RESET signal.

You may have some luck as-is with the design but the above is highly recommended. In the mean time, do check if the #RESET line is truly HIGH after a power up or is it still LOW which would then halt any activity of the XTAG3 (JTAG) traffic.

c) Pin 61 (CPU middle paddle connection) must be mated with GROUND. Often, this is a root cause of such issues as observed from a long list of OEM design reviews. Would not hurt to throw some hot air onto the CPU to guarantee the middle belly pad is truly grounded.

d) Remove R46 as it is not required, R41 serves this PU purpose for #CS of the QSPI flash device.
Post Reply