XMOS timing limitations

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XMOS timing limitations

Postby ktownsend » Thu Feb 24, 2011 1:38 am

I was initiallity interested in using an XMOS device as an alternative to an FPGA, and my first experience is that the tools are great and it's painless to work with (compared to Verilog/VHDL and FPGAs, etc.) and the chips are quite affordable. Unfortunately, I was a bit disappointed to realize that despite the 400MHz/500MHz mentioned for the device, each 'thread' is limited to 100MHz, making it's usefulness for high-speed IO a lot less useful. :-(

Can you confirm a few assumptions for me before I look for an alternatibe solution (convince me I'm wrong!)?

Are you stuck with '100MHz' for the reference clock? I need to capture and generate 13.56MHz signals (NFC/RFID), and obviously that doesn't divide conveniently into 100MHz to reliably capture the individual bits. Is there a problem to replace the 20MHz oscillator with a 13.56MHz one for more appropriate timing (= 94,92MHz per thread)?

It seems incredibly tight to me, but is it realistic to analyse an incoming line at 13.56MHz, and detect a specific pattern of bits, and if the pattern is found generate a specific output signal at 13.56MHz? With only 7 'ticks' per 'bit' that seems like a tall order, but maybe with multiple threads there's a solution ... I just don't know the limits of the core well enough to judge.

I'd love to use these chips, but would hate to lose 3 months on a dead end for this project.
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Postby rp181 » Thu Feb 24, 2011 3:33 am

I am kind of new to the more complex stuff, so correct me if I am wrong.

Each IO pin has a limit of 10 ns. To have a different frequency, you can use clocks at the specified frequency. See page 41 in the XC Programming Guide (Generating a Clock Signal):

Page 45 shows how to do IO based on a clock.

You could change the hardware with a different clock source (change the XN file), but detrimental in your case.

http://www.xmos.com/published/programmi ... os-devices
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Postby ktownsend » Thu Feb 24, 2011 10:41 am

Thanks for the feedback. I'll have to look into how to change the 20MHz oscillator to 13.56, and see where I can get with that.
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Postby Folknology » Thu Feb 24, 2011 12:16 pm

hi ktownsend

You can take each thread to 125Mhz with 500Mhz parts if you need a little more speed.

You can use whatever clock you like to derive the systems timings (within certain limits, see the clock document) . I don't see any specific issues with your clock rates, just remember all internal timings etc have to be derived from your ref clock.

As for triggering on bit patterns that's just the kind of thing that the XS1 is good at, you can use a select statement with a bit pattern case as required. By using a buffered port with enough bits for your pattern could make this trivial.

what is the bit pattern? and what do you have do do when detected?

PS you can also use an external clock to clock data in

Last edited by Folknology on Thu Feb 24, 2011 6:34 pm, edited 1 time in total.
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Postby ktownsend » Thu Feb 24, 2011 4:32 pm

Thanks for the reply ... that document cleared up a lot of things. I'll probably have to make a custom board, but at least the timing is a lot more flexible than I originally thought.
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Postby paul » Mon Feb 28, 2011 11:28 am

The reference clocks can also be changed if necessary. This is done in the XN file.

An example declaration is shown below:

Code: Select all

<Node Id="0" Type="XS1-L1A-LQ64" Oscillator="13Mhz" SystemFrequency="480Mhz" ReferenceFrequency="96Mhz">
The reference frequency can be pretty much anything you want (within the limitations of the PLL - the limits of which I cannot remember). I have used fast reference clocks for doing fine grain PWM (had it running at 200Mhz).

On two occasions I have been asked, 'Pray, Mr. Babbage, if you put into the machine wrong figures, will the right answers come out?' I am not able rightly to apprehend the kind of confusion of ideas that could provoke such a question.

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