I wrote this post because I have a doubt. The XE232 processor (and all 32 tile processors) are made by 2 for 16 tile processors and are linked together with a series of xconnect link as explained in the image below:
Now I have more question about this:
1) Are this type of connection managed automatically when I use a channel communication between core that are in SIDE-A and SIDE_B?
2) If I connect flash memory on xcore, the xcore and xcore boot correctly without any direct reference on the .XN file? Or I must explain this type of link in tha .XN file?
3) If I want to use only this internal link between SIDE_A and SIDE_B, I must use externally (for other pourpose) all the other pins that have xlink function?
4) Where I can find an example of .XN file for XE232 processor?
If you have a simple question and just want an answer.
1 post • Page 1 of 1
- Posts: 29
- Joined: Wed Oct 02, 2013 4:20 pm
You do not have the required permissions to view the files attached to this post.