I am a complete noob in the XMOS realm, so please excuse my naive and not so detailed questions.
I am looking to integrate the XMOS (XUF216-512-tq128) with nRF52840 where the nRF can be used to perform the field updates for the XMOS.
Can the field updates be done over USB or UART? Is there an application note or an example code from which I can refer?
Field updates for XUF216-512
-
HJK46
- Newbie
- Posts: 1
- Joined: Thu Mar 26, 2020 7:49 pm
-
mon2
- XCore Legend
- Posts: 1913
- Joined: Thu Jun 10, 2010 11:43 am
Hi. The best suggestion is to review one of the assorted kits that make use of the XCORE-200 series CPU and review how they are programmed. The common interface is the XTAG-3 tool (p/n XA-XTAG). This add-on board is often applied with an IDC header connector to allow for programming / erasing / debugging of the target CPU / flash. You may be able to reduce the footprint of this honker connector using something a bit more modern but will be at a higher cost like tag-connect. The XMOS XTAG tool will convert USB to the JTAG interface and be recognized by their toolchain so that you do not have to re-invent the wheel.
Other ideas that should work is to:
a) park the XMOS CPU into RESET (assert a LOW and keep the pin LOW) - this will HI-Z the interface lines on the CPU
b) then proceed to interface with the SPI flash device that is internal to the CPU and use an external programming tool (ie. USB to SPI, etc.) but here, you will have to depend on the USB to SPI tool to program your target flash device.
While we are not audio developers, the product does support DFU interface which will use an embedded boot loader in the flash image that will allow for future upgrades to your firmware over the USB interface. So you would program the flash at the factory and ship -> then in the field, your client can reflash as required.
At this time, not sure where the support stands with respect to the DFU tools - believe one version is without cost from XMOS and another that is a commercial GUI tool out of Germany (THESYCON).
On your thoughts of using a wireless link, in theory it could work but would not recommend for JTAG style of interfacing. From our past experience, we did perform some limited JTAG command emulation using a Lattice FPGA and XMOS CPU. Did manage to get some commands to work correctly with XMOS spewing out commands to the Lattice CPU to erase / program some target locations in the FPGA. So you would have to do the same if using JTAG. May be more practical to use the RESET and assert external signals to program the SPI flash (ISSI was used by XMOS for this internal flash BTW). The SPI flash programming process is well documented on the internet. You will be parking the CPU and sending out either SPI (simple but slower) or QSPI commands and data traffic.
Hope this helps.
Other ideas that should work is to:
a) park the XMOS CPU into RESET (assert a LOW and keep the pin LOW) - this will HI-Z the interface lines on the CPU
b) then proceed to interface with the SPI flash device that is internal to the CPU and use an external programming tool (ie. USB to SPI, etc.) but here, you will have to depend on the USB to SPI tool to program your target flash device.
While we are not audio developers, the product does support DFU interface which will use an embedded boot loader in the flash image that will allow for future upgrades to your firmware over the USB interface. So you would program the flash at the factory and ship -> then in the field, your client can reflash as required.
At this time, not sure where the support stands with respect to the DFU tools - believe one version is without cost from XMOS and another that is a commercial GUI tool out of Germany (THESYCON).
On your thoughts of using a wireless link, in theory it could work but would not recommend for JTAG style of interfacing. From our past experience, we did perform some limited JTAG command emulation using a Lattice FPGA and XMOS CPU. Did manage to get some commands to work correctly with XMOS spewing out commands to the Lattice CPU to erase / program some target locations in the FPGA. So you would have to do the same if using JTAG. May be more practical to use the RESET and assert external signals to program the SPI flash (ISSI was used by XMOS for this internal flash BTW). The SPI flash programming process is well documented on the internet. You will be parking the CPU and sending out either SPI (simple but slower) or QSPI commands and data traffic.
Hope this helps.
-
akp
- XCore Expert
- Posts: 579
- Joined: Thu Nov 26, 2015 11:47 pm
DFU with xmosdfu.cpp will work
Review here for Windows https://www.xcore.com/viewtopic.php?t=7162
and here for Mac https://www.xcore.com/viewtopic.php?t=3572
should also work on Linux of course
Or you could take the firmware upgrade code from the AVB stack and write your own wrapper if you want to do over the air upgrades
Review here for Windows https://www.xcore.com/viewtopic.php?t=7162
and here for Mac https://www.xcore.com/viewtopic.php?t=3572
should also work on Linux of course
Or you could take the firmware upgrade code from the AVB stack and write your own wrapper if you want to do over the air upgrades