I am making a board based on the XE216-512-TQ128 chip and LAN8710A (100Mbit Ethernet).
I am trying to do the same as in document AN00120.
Ports are distributed as follows:
port p_eth_rxclk = on tile[1]: XS1_PORT_1O;
port p_eth_txd = on tile[1]: XS1_PORT_4B;
port p_eth_rxdv = on tile[1]: XS1_PORT_1A;
port p_eth_txen = on tile[1]: XS1_PORT_1B;
port p_eth_txclk = on tile[1]: XS1_PORT_1P;
clock eth_rxclk = on tile[1]: XS1_CLKBLK_1;
clock eth_txclk = on tile[1]: XS1_CLKBLK_2;
and I don’t know how to correctly determine the following ports:
port p_eth_rx0 = on tile[1]: XS1_PORT_4A [3];
port p_eth_rx1 = on tile[1]: XS1_PORT_4A [2];
port p_eth_rx2 = on tile[1]: XS1_PORT_4A [1];
port p_eth_rx3 = on tile[1]: XS1_PORT_4A [0];
port p_eth_rxerr = on tile[1]: XS1_PORT_4C [3];
port p_smi_mdio = on tile[1]: XS1_PORT_4C [2];
port p_smi_mdc = on tile[1]: XS1_PORT_4C [1];
};
port definition code
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Daniil96Let
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- Joined: Tue Feb 19, 2019 2:16 pm
