0xc, 0x10c causes a trap.

0xb,0x10b, fixes the vector, but it still ends at the same place.

Code: Select all

```
stdcore[0]@0- -A-p-.----0001004a (t0inner + 2) : setv res[r5(0x2)], r11(0x1004e) @205
stdcore[0]@1- -p-A-.----.0001005e (t1inner + 2) : bt r2(0x9), -0x2 @207
stdcore[0]@0-P-A-p-.----0001004c (t0inner + 4) : waiteu @209
stdcore[0]@1- -weA-.----.0001005c (t1inner + 0) : sub r2(0x8), r2(0x9), 0x1 @211
stdcore[0]@1- -weA-.----.0001005e (t1inner + 2) : bt r2(0x8), -0x2 @215
stdcore[0]@1- -weA-.----.0001005c (t1inner + 0) : sub r2(0x7), r2(0x8), 0x1 @219
stdcore[0]@1- -weA-.----.0001005e (t1inner + 2) : bt r2(0x7), -0x2 @223
stdcore[0]@1- -weA-.----.0001005c (t1inner + 0) : sub r2(0x6), r2(0x7), 0x1 @227
stdcore[0]@1- -weA-.----.0001005e (t1inner + 2) : bt r2(0x6), -0x2 @231
stdcore[0]@1- -weA-.----.0001005c (t1inner + 0) : sub r2(0x5), r2(0x6), 0x1 @235
stdcore[0]@1- -weA-.----.0001005e (t1inner + 2) : bt r2(0x5), -0x2 @239
stdcore[0]@1- -weA-.----.0001005c (t1inner + 0) : sub r2(0x4), r2(0x5), 0x1 @243
stdcore[0]@1- -weA-.----.0001005e (t1inner + 2) : bt r2(0x4), -0x2 @247
stdcore[0]@1- -weA-.----.0001005c (t1inner + 0) : sub r2(0x3), r2(0x4), 0x1 @251
stdcore[0]@1- -weA-.----.0001005e (t1inner + 2) : bt r2(0x3), -0x2 @255
stdcore[0]@1- -weA-.----.0001005c (t1inner + 0) : sub r2(0x2), r2(0x3), 0x1 @259
stdcore[0]@1- -weA-.----.0001005e (t1inner + 2) : bt r2(0x2), -0x2 @263
stdcore[0]@1- -weA-.----.0001005c (t1inner + 0) : sub r2(0x1), r2(0x2), 0x1 @267
stdcore[0]@1- -weA-.----.0001005e (t1inner + 2) : bt r2(0x1), -0x2 @271
stdcore[0]@1- -weA-.----.0001005c (t1inner + 0) : sub r2(0x0), r2(0x1), 0x1 @275
stdcore[0]@1- -weA-.----.0001005e (t1inner + 2) : bt r2(0x0), -0x2 @279
stdcore[0]@1- -weA-.----.00010060 (t1inner + 4) : out res[r6(0x102)], r9(0x10) @283
stdcore[0]@0Event caused by res 0x00000002, V=0x0001004e, EV=0x00000002 @287
```

Code: Select all

```
_start:
ldc r1, 10
notmain:
sub r1,r1,1
bt r1, notmain
ldc r10,0x000b
get r11,ps[r10]
ldc r10,0x010b
set ps[r10],r11
ldc r11, 0x6 # the I/O ports need a clock
setc res[r11], 0x8 # setci
setc res[r11], 0xf # setci
# define XS1_PORT_32A 0x200000
ldc r9,0x2000
shl r9,r9,8
setc res[r9],0x8 # turn the port on
ldc r1,0x6 # give it a clock
setclk res[r9],r1
getr r5,2
getr r6,2
setd res[r5],r6
setd res[r6],r5
getr r4,0x3 # get a synchronizer
getst r0,res[r4] # allocate a thread
ldap r11,thread1 # get address for the code for new thread
init t[r0]:pc,r11 # set pc for new thread
set t[r0]:r5,r5
set t[r0]:r6,r6
msync res[r4] # start all allocated threads
bu thread0 # give thread 0, the main thread, a place to go
thread0:
ldc r0,0x0
clre
eeu res[r5]
t0outer:
out res[r9],r0
t0inner:
ldap r11,t0thread1
setv res[r5],r11
#setv res[r6],r11
waiteu
t0thread1:
in r10,res[r5]
#outct res[r5],1
xor r0,r0,r10
bu t0outer
thread1:
ldc r9,0x0010
ldc r3,11
t1outer:
mov r2,r3
t1inner:
sub r2,r2,1
bt r2,t1inner
out res[r6],r9 # send some data to thread0
#chkct res[r5],1
bu t1outer
```