Use 45/49Mhz to achieve correct SPDIF outputHi, I use XU216, the audio clock uses 45.1584 /49.152Mhz, but the SPDIF out

Sub forums for various specialist XMOS applications. e.g. USB audio, motor control and robotics.
xiao
Junior Member
Posts: 4
Joined: Fri May 17, 2013 7:13 pm

Use 45/49Mhz to achieve correct SPDIF outputHi, I use XU216, the audio clock uses 45.1584 /49.152Mhz, but the SPDIF out

Post by xiao »

Hi,
I use XU216, the audio clock uses 45.1584 /49.152Mhz, but the SPDIF output becomes 88.2K-384K, 44.1/48K output cannot be achieved.
Tried to modify SpdifTransmit.xc, but failed.
Please help.
thanks


mmar
Experienced Member
Posts: 70
Joined: Fri Jul 05, 2013 5:55 pm

Post by mmar »

Yes you need write SpdifTransmit_8 or change divide clock for 44/48
xiao
Junior Member
Posts: 4
Joined: Fri May 17, 2013 7:13 pm

Post by xiao »

mmar wrote: Wed Jan 20, 2021 5:15 pm Yes you need write SpdifTransmit_8 or change divide clock for 44/48
Thanks.
I changed ‘divide = mclkFreq / (samFreq * 2 * 32 * 2);’ to ‘divide = mclkFreq / (samFreq * 2 * 32 * 2 * 2);’, but but it does not work.
mmar
Experienced Member
Posts: 70
Joined: Fri Jul 05, 2013 5:55 pm

Post by mmar »

I write change divide clock, that mean set on input pin MCLK divider 2 , i mean xcore200 can do this. Only when 44/48 and , then you have MCLK 22/24
that need be changed in code...
xiao
Junior Member
Posts: 4
Joined: Fri May 17, 2013 7:13 pm

Post by xiao »

mmar wrote: Fri Jan 22, 2021 7:51 am I write change divide clock, that mean set on input pin MCLK divider 2 , i mean xcore200 can do this. Only when 44/48 and , then you have MCLK 22/24
that need be changed in code...
Dear mmar, thank you. MCLK divider 2, I got it.