usb audio with internal mclk

Sub forums for various specialist XMOS applications. e.g. USB audio, motor control and robotics.
pasau
Experienced Member
Posts: 75
Joined: Fri Dec 06, 2013 7:05 pm

usb audio with internal mclk

Postby pasau » Thu Apr 09, 2020 5:13 am

Hi, i would like to start testing the USB audio framework on the xCORE-200 explorer board to make use of the IO headers to connect some DAC boards with I2S input.

Of course, the framework does not support doing audio without an external clock source, which is normal, but for my purpose i don't mind losing samples and having distortion for this phase of development.

i based my application off of the mc-audio configuration for the framework since it also has a xcore-200 chip. so far i have modified the mclk and mclk2 (for the 2 tiles) generation code in main.xc and audio.xc in this manner:

Code: Select all

//modified
configure_clock_rate(clk_audio_mclk2, 100, 8); 
configure_port_clock_output(p_mclk_in2, clk_audio_mclk2);
set_port_clock(p_for_mclk_count, clk_audio_mclk2);
start_clock(clk_audio_mclk2);
//default
//set_clock_src(clk_audio_mclk2, p_mclk_in2);
//set_port_clock(p_for_mclk_count, clk_audio_mclk2);
//start_clock(clk_audio_mclk2);
So the clock is now taken from a clock block and output to p_mclk_in, rather than input from the pin and used as a source to generate the internal mclk. The other I2S signals need p_mclk_in and clk_audio_mclk to be generated and with this change they should still have working clocks on p_mclk_in and clk_audio_mclk. Of course mclk and mclk2 are generated separately on 2 tiles, rather than input from the same external signal, which is why i expect to lose samples once in a while.
I haven't looked into setting mclk for different sampling rates but i think it should work.

So i think this test setup should work, but im looking for a general validation.
Thank you!
fabriceo
Active Member
Posts: 40
Joined: Mon Jan 08, 2018 4:14 pm

Postby fabriceo » Fri Apr 10, 2020 9:12 am

Hi Pasau
I can confirm that you can clock your Usb audio app from the internal 100mhz clock, divided according to your need.
you can also tune a little bit the 100mhz playing with the PLL register and typically get close to the 49.152mhz. (I couldn't get 45mhz working may be due to XUD library).
unless you use spdif_tx or adat_tx on tile1, mclk2 is needed only for the feedback endpoint and then you could adapt the calculation made in the usb_buffer.xc case SOF to give the proper 16:16 value to the host. Or you can just clock the port "p_off_mclk" from the 100mhz divided.
this will work without external crystal.
pasau
Experienced Member
Posts: 75
Joined: Fri Dec 06, 2013 7:05 pm

Postby pasau » Sat Apr 11, 2020 6:40 am

fabriceo wrote:
Fri Apr 10, 2020 9:12 am
thanks for the valuable information. Getting the exact multiple of clock frequency seems difficult; so far the best i got is this graph of samples of a tone i read with the xscope interface as they were output to the i2s port. the four small dots are when the buffer runs out of samples due to my generated bit clock being a bit faster than what is needed for this sampling rate.

Of course, the problem seems that since the 2 tiles don't share a clock block they won't have the same master clock, so the feedback to the host won't be based on the actual master clock, but a "copy" of it. not sure it makes the biggest difference here, i will look into the feedback endpoint a little bit more.

Image
mmar
Active Member
Posts: 56
Joined: Fri Jul 05, 2013 5:55 pm

Postby mmar » Sat Apr 25, 2020 12:30 pm

Hi, as first audio code for DAC only dont need two tiles , try use only one tile. And second XSCOPE maybe isnt good choice to check real run application.
Try run code without debug and measure real signals with real scope.
Simply when you play to DAC sinewave 1kHz with use other mclk as desired , result is 1200Hz or 800Hz without skip...

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