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xConnect channels between logical cores on same tile

Posted: Wed Aug 11, 2021 4:24 pm
by erlingrj
Hi there.

As far as I understand the xConnect on XS2 we have 4 physical links from each Tile onto the Switch. Each Switch has 8 physical links that can connect it to other on-chip or off-chip tiles. My question is, what happens when two logical cores on the same tile open e.g. a streaming channel between them. Please see the attached PNG where I indicate 2 possibilities:
1. A channel is formed through the switch itself and will consume of the available bandwidth of the switch
2. A channel is formed directly between the logical cores and the available bandwidth of the switch remains unchanged

I want to use the Streaming UART library which allows for baud rates >115200. However it requires a streaming channel being opened and AFAIK the Switch can only support 4 concurrent streaming channels. My application needs >4 UART receiver which makes it infeasible. I would need to implement a fast_uart that uses shared memory rather than a streaming channel


Thanks for your help.

Re: xConnect channels between logical cores on same tile

Posted: Wed Aug 11, 2021 10:50 pm
by CousinItt
The data does say that there are four links from each tile to the switch, but the build process reports 32 chanends per tile. Use the -report switch to see your usage. I'm not sure of the details but I am guessing that each channel doesn't consume all of the resources of a link, presumably a certain range of tokens are allocated for each channel.

I tried a quick example using 6 streaming UART receiver tasks and a single task to take all their data, all on the same tile. It built quite happily, consuming two chanends per receiver, and I was able to start it in the simulator, even if it didn't do much.

If you don't need super-high speeds, it might also be a possibility to base your own driver on the UART library, or just tweak it a bit. That might allow you to get more than just one receiver per core. I've never really understood why the standard (non-streaming) UART was limited to 115200 bps.

For more on the links see here: https://www.xcore.com/viewtopic.php?f=47&t=7946

Re: xConnect channels between logical cores on same tile

Posted: Thu Aug 12, 2021 4:04 pm
by erlingrj
Hi Cousin! Thanks for your reply and the links. It seems as if data can be routed between chanends without leaving the tile. This makes sense and makes things easier for me. I will verify this when I get a dev kit.

Re: xConnect channels between logical cores on same tile

Posted: Thu Aug 12, 2021 4:28 pm
by CousinItt
No problem. I've just been looking at this again and I think I have a better understanding. Each tile has 32 chanends (according to the data sheets for the devices I've looked at) and I think the switch is only involved in communication between tiles. There appears to be a local switch on each tile which allows for communications between its cores as you say, but this isn't really explained anywhere that I've been able to find. Please ignore what I said about tokens. If a streaming channel is made between two tiles (whether or not in the same package) then I think that would tie up a link. More info below.

https://www.xmos.ai/download/xCONNECT-A ... e(1.0).pdf

Re: xConnect channels between logical cores on same tile

Posted: Mon Aug 16, 2021 5:50 pm
by akp
Yes, I am pretty sure that streaming channels where the chanends are on the same tile don't consume inter-tile switch resources. They just use the on-tile FIFO resource.