HI Folks, wonder if you can help
I am working on a small project that requires both USB and Ethernet, boardspace and cost are forcing me to use a minimised BOM.
I intend using SMSC's LAN8710 to drive the 100baset ethernet and the USB3317 to drive the USB. I was wondering if it is possible to get away with using a single 26Mhz Oscilator. Obviously this is fine for the USB side of things, but can I use it to clock the L1 and by using dividers etc.. inside the L1 then drive the LAN8710.
Or is there some other single freq Oscillator I can use to achieve a similar goal.
Or do I have to revert to using 2 separate Oscillators?
USB and Ethernet on single L1 board
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Folknology
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If 26 MHz is too high for the L1 PLL - use a 1:2 clockdivider. That must be much cheaper and smaller than 2 clocks.
Probably not the most confused programmer anymore on the XCORE forum.
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Folknology
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@lilltroll 26Mhz is in range for the L1 (4.2-100Mhz)
But can I derive the required 25Mhz clock for the LAN8710 from the L1, running it at 400Mhz
e.g.
R= 12
F=399
OD=0
400Mhz = 26Mhz/(12+1) * ((399+1)/2) /(0+1)
Would give me 400Mhz internal clock
Could I then derive the 25Mhz from the ref clock of 100Mhz (using default refdiv=3) by dividing by 4 and outputting on a pin to drive the Lan8710?
Is this feasible, would there be to much jitter, am I missing something or misunderstanding how the clocks work?
But can I derive the required 25Mhz clock for the LAN8710 from the L1, running it at 400Mhz
e.g.
R= 12
F=399
OD=0
400Mhz = 26Mhz/(12+1) * ((399+1)/2) /(0+1)
Would give me 400Mhz internal clock
Could I then derive the 25Mhz from the ref clock of 100Mhz (using default refdiv=3) by dividing by 4 and outputting on a pin to drive the Lan8710?
Is this feasible, would there be to much jitter, am I missing something or misunderstanding how the clocks work?
This will work fine.
There is no problem in running the L1 at 400MHz (or 500MHz) from a 26MHz input clock, using the divider values you suggest.
It is also straightforward to run a clock block at 25MHz using the 100MHz reference clock divided by 4 as you say.
There should be no problem with jitter either, 25MHz is 40ns, so an jitter is tiny compared to the period.
There is no problem in running the L1 at 400MHz (or 500MHz) from a 26MHz input clock, using the divider values you suggest.
It is also straightforward to run a clock block at 25MHz using the 100MHz reference clock divided by 4 as you say.
There should be no problem with jitter either, 25MHz is 40ns, so an jitter is tiny compared to the period.
Your main problem here is that you won't be able to fit Ethernet and USB on a single core. The USB implementation uses ports internally which means there are some restrictions on I/O that won't allow you to attach Ethernet as well. This design definitely sounds more suited to an L2.
If you are developing a volume product then it might be a good idea to take advice on this design.
If you are developing a volume product then it might be a good idea to take advice on this design.
Paul
On two occasions I have been asked, 'Pray, Mr. Babbage, if you put into the machine wrong figures, will the right answers come out?' I am not able rightly to apprehend the kind of confusion of ideas that could provoke such a question.
On two occasions I have been asked, 'Pray, Mr. Babbage, if you put into the machine wrong figures, will the right answers come out?' I am not able rightly to apprehend the kind of confusion of ideas that could provoke such a question.
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Folknology
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Well that would be a show stopper of course!!
Perhaps you can explain which ports are being used internally, I intend using an L1-128 so assumed I would have more than room enough.
regards
Al
Perhaps you can explain which ports are being used internally, I intend using an L1-128 so assumed I would have more than room enough.
regards
Al
The L1 USB Audio board is a good place to start. This has the 128 pin device on it and uses all of the available IO. Offhand I can't remember the exact limitations, but the L1 UAC2 board is good reference.
Paul
On two occasions I have been asked, 'Pray, Mr. Babbage, if you put into the machine wrong figures, will the right answers come out?' I am not able rightly to apprehend the kind of confusion of ideas that could provoke such a question.
On two occasions I have been asked, 'Pray, Mr. Babbage, if you put into the machine wrong figures, will the right answers come out?' I am not able rightly to apprehend the kind of confusion of ideas that could provoke such a question.
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Folknology
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Frankly I am astounded it is not possible to do both Ethernet and USB on an 128 pin L1. I mean Xtag2 runs USB, JTAG and a LLink on a 64 pin L1.
Is it possible to confirm that this is definitely the case, how many pins is the USB using on top of the connected ones? Someone must know the detail, I would like to see the explanation.
It will mean of course that I have a very large problem so I need to be sure, L2 is not an option due to cost both of the Chip and going to 4 layer.
I just find it difficult to believe, on a 128 pin FPGA this would be trivial, and its not that its all that unusual to need both of these things.
Is it possible to confirm that this is definitely the case, how many pins is the USB using on top of the connected ones? Someone must know the detail, I would like to see the explanation.
It will mean of course that I have a very large problem so I need to be sure, L2 is not an option due to cost both of the Chip and going to 4 layer.
I just find it difficult to believe, on a 128 pin FPGA this would be trivial, and its not that its all that unusual to need both of these things.
Hopefully someone else will be able to enlighten you on the specifics.
However, I was just wondering what your application is? USB to Ethernet has been available as an ASIC for years, and they are likely to be very BOM optimized solutions - designed to be as simple and cheap as possible. I guess it must be more subtle than an USB to Ethernet conversion - and if so you need to be careful of the required thread count for the app - if you have looked at the XC-2 code you will quickly see the ethernet and TCP/IP stacks are non-trivial lumps...
Are you able to elaborate to your app?
However, I was just wondering what your application is? USB to Ethernet has been available as an ASIC for years, and they are likely to be very BOM optimized solutions - designed to be as simple and cheap as possible. I guess it must be more subtle than an USB to Ethernet conversion - and if so you need to be careful of the required thread count for the app - if you have looked at the XC-2 code you will quickly see the ethernet and TCP/IP stacks are non-trivial lumps...
Are you able to elaborate to your app?
Paul
On two occasions I have been asked, 'Pray, Mr. Babbage, if you put into the machine wrong figures, will the right answers come out?' I am not able rightly to apprehend the kind of confusion of ideas that could provoke such a question.
On two occasions I have been asked, 'Pray, Mr. Babbage, if you put into the machine wrong figures, will the right answers come out?' I am not able rightly to apprehend the kind of confusion of ideas that could provoke such a question.
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Folknology
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Hi Paul
Obviously squeezing Ethernet and USB into a single core means compromising threads, and in that case I would not be running both concurrently (although there are a few possible exceptions for low level transmissions). In normal circumstances it will be:
1) Ethernet + TCP/IP or USB
2) Ethernet + USB with TCP/IP running externally
I have looked at the threads and its just possible to squeeze them in in this manner. This gives me slightly lower functionality but really good BOM and assembly. However if its not physically possible to do with with a single L1-128 Then this route is closed.
The second alternative is either an L2 (which requires 4 layer boards) or 2 * L1-64s. In this case the latter is more preferable.
The board in this instance is part of a larger modular subassembly and represents the communication/monitoring & management stack.
It does little if any general purpose I/O (a small optional serial role).
Hope this helps frame it a little better
regards
Al
Obviously squeezing Ethernet and USB into a single core means compromising threads, and in that case I would not be running both concurrently (although there are a few possible exceptions for low level transmissions). In normal circumstances it will be:
1) Ethernet + TCP/IP or USB
2) Ethernet + USB with TCP/IP running externally
I have looked at the threads and its just possible to squeeze them in in this manner. This gives me slightly lower functionality but really good BOM and assembly. However if its not physically possible to do with with a single L1-128 Then this route is closed.
The second alternative is either an L2 (which requires 4 layer boards) or 2 * L1-64s. In this case the latter is more preferable.
The board in this instance is part of a larger modular subassembly and represents the communication/monitoring & management stack.
It does little if any general purpose I/O (a small optional serial role).
Hope this helps frame it a little better
regards
Al