Page 1 of 1

Link 'buffer' question

Posted: Fri Feb 05, 2010 9:04 pm
by vanjast
A question for those who have made their own pcb's

Has anyone buffered their Link lines across different pcbs.
If not, are the Links 'stable' through connectors (say IDC) ?

I'm thinking that I should use some LVDS buffers for the links, which is an extra hassle, but If this is not necessary, I'd prefer to go without this.

Thanks
Van

Re: Link 'buffer' question

Posted: Sun Feb 07, 2010 9:13 pm
by TonyD
The XK-1 boards use a standard 20-pin IDC headers to interconnect to other XK-1 boards so I wouldn't have thought it a problem unless you're planning on having your boards some distance away from each other.

Re: Link 'buffer' question

Posted: Tue Feb 09, 2010 10:12 pm
by vanjast
Ja.. I'm just worried about the impedance matching, even at short distances across IDC.
I haven't done this thing before, so I'm 'treading carefully'.

I'll have to settle for LVDS as I do not want to restrict myself to short distances.

Re: Link 'buffer' question

Posted: Thu Feb 18, 2010 3:46 pm
by Bianco
Xlinks over LVDS has been done succesfully

Re: Link 'buffer' question

Posted: Tue Feb 23, 2010 5:52 pm
by dan
Hi Vanjast,

you should find these new app notes useful in answering your questions.

xmos.com->Support->Documentation: Silicon

XS1-L Link Performance/Design Guidelines
XS1-G Link Performance/Design Guideline

Not sure whether you are using XS1-L or G.

Let me know if these notes answer your questions.

Cheers,

Dan

Re: Link 'buffer' question

Posted: Tue Feb 23, 2010 6:37 pm
by lilltroll
In the XMOS video with Dave and the thin ribbon-cable to interconnect L1's, they use a buffer for the 5pin interface.

Re: Link 'buffer' question

Posted: Sat Mar 06, 2010 12:08 pm
by vanjast
Just got back from a trip...
Thanks for the further replies.. I'll have a look at these

Re: Link 'buffer' question

Posted: Mon Mar 08, 2010 10:15 am
by Woody
I've been using unbuffered links down IDC cable lengths of 20cm or so with good data rates.

If you need integrity at the expense of link performance you can always slow the links down by using a large delay between the links (inter-symbol delay). That way you can transfer data across really quite poor links. Each symbol corresponds to a transition on one of the link wires. So long as each symbol being transmitted is received as a single symbol (i.e. a transition is not received as 3 transitions due to ringing etc) the link's integrity should be fine.