XCore Exchange

How is a non specified I/O pin configured on boot or afterwards if it isn't used within the code?

I am thinking electrically here, could something be attached to it without being effected until the pin is configured by the program?

Can I also can an I/O pin (non link) between L1s in a manner safely, whereby programs running on both could accidentally turn both pins high/low etc.. I am trying to avoid damaging the I/O or chip if this situation occurred. Or would I need to introduce a small resistance just in case?

Hei,

Information in the XS1-G4 144 BGA Datasheet is in section 5.2 footnote 4 "Internal pull-up resistors are fitted to general purpose XCore I/O pins. Applies to both XCore I/O and XCore link I/Os." I don't think you would want to drive an i/o pin in different directions at each end of a connection - better arrange which direction each pin will operate and only drive pins designated as outputs.

I don't think you would want to drive an i/o pin in different directions at each end of a connection - better arrange which direction each pin will operate and only drive pins designated as outputs.

:lol:
Julian I know it sounds dumb and in normal cases it wouldn't be designed to be able to do this. However I have no control over some of the connections in this case. With a 'Softchip' and plugin modules it is easy for this situation to occur, I am just trying to insure that the chip isn't fried when this happens..
I am likely to opt for 33 Ohms resistors in series where this is likely. I'm just wondering if anyone else here or at Xmos has figured or experienced the same thing.

P.S. have you replied to my PiXC implementation question yet?

Folknology wrote:...
I am likely to opt for 33 Ohms resistors in series where this is likely.

I would normal put a small resistance between the two IC signals, 33R should be fine.