I am working on a board that integrates a L2 processor, and a copy of the XTAG2 for programming and USB connectivity (Modified it slightly to incorporate a usb OTG port, as it will be used as a slave and master USB device). I am a little doubtful of some system pins and JTAG pins. It would be great if someone could look these over. Here are specific issues:
1)I would like the boot source to be automatically selected, JTAG when connected to a PC and flash when connected to a slave. I do not plan on modifying the XTAG bootloader code, a XLink will provide data to be translated to the USB port. Will there be a problem with booting from the flash when a USB slave is connected? Are my MODE Pins on the L2 configured correctly (1:0 logic high, 3:2 TRST_N, and 4 GND), and will TRST_N be able to provide enough current (connected to the L1 TRST, L2 TRST, and a L1 IO port from the XTAG)?
2)To program the L1 with the bootloader, I was going to breakout the JTAG signals from a XTAG2, and use it to program a new XTAG2. Is this the correct way?
I attached the EAGLE files.
EDIT: I replaced the files. Nothing different, I just cleaned up the schematics.