Suggested DRAM type usage...

Technical discussions around xCORE processors (e.g. xcore-200 & xcore.ai).
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dan
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Post by dan »

Super!

As per:

https://github.com/xcore/Community/wiki ... management

you can just file an issue in the community repo asking for the new repo, in this case sc_sdram I guess.

The wiki also notes that its best to get a candidate repo ready in github under your own name with the basic structure in place ready to be moved across into xcore.

So when you are ready to go with the first set of files and a readme submit an issue as above. Of course if you have any issues with this repo establishment process lets discuss it but we shouldn't let that get in the way of getting your sdram project off the ground.

Cheers,

Dan


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Folknology
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Post by Folknology »

Hi Dan

It might be an idea to open the Xmos SDRAM code that you use internally, I am presuming that your also using the 32Mx8 Micron in order to connect it up to the L2, eg on the motor board. This SDRAM chip was also used on the Xlinkers Shell project if I recall?

regards
Al
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dan
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Post by dan »

We will certainly open up the SDRAM code - the one from the motor board is a Micron 16Mx16, running about 12.5MB/s.

Then that code can be combined with the various different layouts and things people have done. However we are waiting for a volunteer to maintain it (e.g. get it all building with the github build system, write the readmes and docs etc) alongside various board implementations and check it works with other common parts.

Since russf has stepped up to do (some of) this, at least for now, as soon as the repo is established we can donate the code.
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russf
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Post by russf »

I'm just completing a layout that I want off my desk in the next couple of days. I would hope to get to this by Tuesday UK time. This exact component would be my next task anyway, and I'll be happy to get the repo set up.
If someone wants to go ahead with it, I don't want to block them.
--r
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Folknology
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Post by Folknology »

Dan that data rate seems very low, are you sure your are correct?

regards
Al
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octal
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Post by octal »

Folknology wrote:Dan that data rate seems very low, are you sure your are correct?

regards
Al
I tought it would be arround 20 to 30MB/sec :shock:
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dan
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Post by dan »

Folknology wrote: are you sure your are correct?
no :D
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Folknology
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Post by Folknology »

Dan I am interested in the kind of data rates one actually gets, do Xmos have any benchmarks or figures around this SDRAM design?

regards
Al
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dan
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Post by dan »

Hi Al, Did you know there is an sdram component that can be downloaded from the website right now? The burst version of that, has a readme with which for width 16 suggests 50 MB/sec.

I think the way we have it configured on the motor board and the driver we're using is what gives 12.5 in that app. I'm a bit hazy on it since I have not been personally technically involved with any projects that use it to date.

The purpose of putting this code (currently on the website) in an xcore repo would be so we can all add support, tests and layout/schematic examples for a wider range of parts and use cases.

Anyway take a look at the website code (follow the links to software components) and have a look.

Dan
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Folknology
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Post by Folknology »

Yeah that example is L1-128 based because it uses XS1_PORT_32A for the Address bus, I was looking for something L2 based really.

It also pulls some port tricks with XS1_PORT_1H & XS1_PORT_1I probably to get the correct edges which is also tricky on L2 as even more ports are used.

Any ideas?

regards
Al
Last edited by Folknology on Fri Mar 04, 2011 3:20 pm, edited 1 time in total.
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