PCB routing: Using unconnected/floating pins Topic is solved

Technical questions regarding the XTC tools and programming with XMOS.
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dsteinwe
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PCB routing: Using unconnected/floating pins

Post by dsteinwe »

Hi,

I'm currently routing the final PCB. I use a XCORE-200 XUF. My questions:

  • Should I leave unused pins unconnected or should I connect them to ground? Does grounding the pins have any positive effect?
  • Should I leave unused pins unconnected, where the corresponding ports are internally used i.e. for USB, or should I connect them also to ground?
  • Can I pass signals (i.e. master clock) over unused pins, where the corresponding ports are internally used for USB, to avoid vias? Is using vias the better way to route lanes?
Cheers
Dieter


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mon2
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Post by mon2 »

Hi.
1. Should I leave unused pins unconnected or should I connect them to ground? Does grounding the pins have any positive effect?
No. Do not leave them floating. Strap to ground to prevent any possible EMI noise. Just good practice.
2. Should I leave unused pins unconnected, where the corresponding ports are internally used i.e. for USB, or should I connect them also to ground?
Ground for the same reason as noted above.
3. Can I pass signals (i.e. master clock) over unused pins, where the corresponding ports are internally used for USB, to avoid vias? Is using vias the better way to route lanes?
No. Use of vias is ok. Follow guidelines for USB High Speed PCB layout with impedance controlled traces. The PCB design must be impedance controlled during production and confirmed to be 90 ohms differential with a TDR test tool. The vendor can do this on demand at no cost or nominal fee (we have seen some offshore suppliers charge $10 USD for this service and will supply a printed report on how the traces are in compliance).

Best if you can share the schematic and PCB layout before submitting to a PCB shop for a quick review of the details.

Will you be producing the bare PCBs locally or offshore? The quality and capabilities vary a great deal offshore. We have used jlcpcb.com for a mix of simple designs but they cannot support complex layouts like HDI (via in pad / blind and buried vias) or small trace / small space. If possible, try to shoot for 5mil trace / space in your design. Use of 4L is a must for USB 2.0 HS designs and to reduce EMI.

Be sure to have in-rush current protection on the USB VBUS line and if possible, EMI inductors on the D+ / D- lines and a nice ESD suppressor - there are simple and low cost USB load switches that can work here. We use them all of the time on our USB products with success.
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dsteinwe
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Post by dsteinwe »

Thanks mon2 for your great support.
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akp
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Post by akp »

I think alternatively to strapping the unused IO down if you set them to output and drive them low in software it should be pretty much the same if your GND is good. My opinion only.
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dsteinwe
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Post by dsteinwe »

@akp: That is an interesting idea. Unfortunately, I have no idea, how a mcu is internally built with these pull-up and -down resistors. Finally, I have connected the unused pins to ground to be safe. The pcb is now in production. I hope, that the mucs are available from the authorized dealers soon.
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Post by akp »

The internal pull down resistors on the input pins would be reasonably good but driving them as outputs to GND would be really good since the NMOS outputs have pretty low Rds on they would be quite low impedance and are unlikely to cause or receive . I guess the reason I don't like connecting the pins directly to GND is it's nice if you can to put test points on the pins and then if you need to mod the board with some different signals to the MCU or drive output signals for debugging you have some place to do that. Hope you have success with your pcb.
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dsteinwe
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Post by dsteinwe »

akp wrote: Tue Nov 10, 2020 11:43 pm I guess the reason I don't like connecting the pins directly to GND is it's nice if you can to put test points on the pins and then if you need to mod the board with some different signals to the MCU or drive output signals for debugging you have some place to do that.
That is a nice idea. I will do for the next prototype.
akp wrote: Tue Nov 10, 2020 11:43 pm Hope you have success with your pcb.
Thanks. Fortunately, the first version including USB worked right away. Now in the second version, I only eliminated a few design flaws and reduced the size of the board. So I am optimistic. Have a nice day.
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dsteinwe
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Post by dsteinwe »

I have one more question: Can I also ground the QSPI related pins (X0D04 .. X0D08, X0D10) if I use the internal eeprom?
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akp
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Post by akp »

I assume you mean the internal quadspi FLASH? And not running from the OTP (which isn't an EEPROM, anyway, semantics!!)

The correct pin connections are the in the datasheet for the part. Basically one of the pins will need a pull up and the others must be floating I am pretty sure from memory.
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dsteinwe
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Post by dsteinwe »

Yes, I meant the FLASH not the OTP. And yes, you are right. In the datasheet (X006990) "8 Boot Procedure" on p. 15 is written:
An external 1K resistor must connect X0D01 to VDDIOL. X0D10 should ideally not be connected. If X0D10 is connected, then a 150 ohm series resistor close to the
device is recommended. X0D04..X0D07 should be not connected.
Does it mean, I should not connect any data lane to these pins or simply nothing. If the pins are connected to ground, is the FLASH not readable/writeable?
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