Typos in XA-SK-UART8 Slice Card Tutorials

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mon2
XCore Legend
Posts: 1913
Joined: Thu Jun 10, 2010 11:43 am

Typos in XA-SK-UART8 Slice Card Tutorials

Post by mon2 »

Warning ! There is a serious typo for the XA-SK-UART8 Slice Card Tutorial

See here (for the correct details) and note the location and definitions for JP3 & JP4

https://www.xmos.com/node/15889?page=10

JP3 is CMOS levels - agreed.

JP4 is RS232 levels - agreed

 

Yet, on github postings:

https://github.com/xcore/sc_multi_uart/ ... ations.rst

JP3 (in github photo) is TTL levels - WRONG! Danger Will Robinson....smoke will fly. This jumper block is at RS232 levels.

JP4 (in github photo) is RS232 levels - WRONG! This jumper block is at CMOS levels.

 

The labels and/or wording on github posting must be changed to match the XMOS website (which is correct). The silk screened labels under the jumper blocks are correct.

 

Summary:

JP3 (as per photo on XMOS site) = J3 (in schematic) = CMOS levels

JP4 (as per photo on XMOS site) = J4 (in schematic) = RS232 levels

< updated to clarify jumper references >



srinie
XCore Addict
Posts: 158
Joined: Thu Mar 20, 2014 8:04 am

Post by srinie »

Hi,

Thank you for notifying this back.

We have corrected the typo and updated the document accordingly.

 

Best regards,

Srinivas