U12 waking with an L6

Technical discussions around xCORE processors (e.g. General Purpose (L/G), xCORE-USB, xCORE-Analog, xCORE-XA).
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U12 waking with an L6

Post by Redrat »


We're planning a device with the following architecture:

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Spi Flash
[node0] <--LINK --> [node1] <LB--LINK--LB> [node2]
|_________________________|                |_____|
          XS1-U12                          XS1-L6
With the VDDIO_OUT from the U12 controlling the power supply to the L6 so that when the U12 goes into deep sleep the L6 is powered off.
My question is; will the L6 correctly boot from the U12 upon waking up? I'm assuming the U12 upon waking from deep sleep loads/boots from the Flash as if it was reset and will also boot the L6 as normal, is this correct?