Mutli XS1-G4 and SPI Flash

[TazOne]

Hello everyone!

My question is could i connect lest say 8 XS1-G4 cores and one SPI Flash...but like so that each core has a direct access to spi flash?

for example i have 8 connected mcu-s with xlinks and lets say mcu-s 0-4 are computing something and mcu-s 5-7 are writing to flash but to different addresses...

Also will I be able to use malloc with spi flash?

[Folknology]

My question is could i connect lest say 8 XS1-G4 cores and one SPI Flash...but like so that each core has a direct access to spi flash?

for example i have 8 connected mcu-s with xlinks and lets say mcu-s 0-4 are computing something and mcu-s 5-7 are writing to flash but to different addresses...

Only one core on one chip will have direct access to the SPI flash, the others will have to work through that core across channels/links. You would need a single thread to be in charge of the memory reads and writes.

Also will I be able to use malloc with spi flash?

Unfortunately the flash is not memory mapped so this doesn't make any sense. Further the flash will be very slow unlike the built in SRAM using it as random or even sequential storage will tie threads up with waiting. You can add SRAM or DRAM but again these are not memory mapped as XS1 does not expose an address/data bus. However if you are looking at a shared storage facility for the cores/chips attaching dram to a single core or an FPAG using xmos links could be the way to go. You could then write your storage layer to achieve shared access accross channels for all the other cores. Just remember it won't be as fast as memory mapped SRAM, it will be significantly slower. There are other threads on Xcore that tackle adding memory that would be worth perusing in this regard.

I should also point out that a shared memory model is not what XS1 is really about and to a degree you are trying to fit a square peg into a round hole so expect resistance, this is very different to something like ARM cortex A9/A10 multicores!

regards
Al

[TazOne]

hm ok...the thing is that I need 1-4 GB of addressable memory :\...with out it there is no point...Can I somehow achieve this with Xmos.Maybe i can write some kind of "memory mapping" drivers for flash or is this impossible?

If so what would you recommend?I need a lot of processing power and 1-4GB of addressable memory...Can I even get this in "embedded world" ?

[TazOne]

I have been looking at libflash and i see functions like int f1_getSectorAddress(int) also the read/write functions prototypes look like this

int fl_readStore(unsigned int offset, unsigned int size, unsigned char buffer[]);

int fl_writeStore(unsigned int offset, unsigned int size,unsigned char buffer[], unsigned char tmpStore[]);

This is memory offset right?

Also page 5 form the libflash doc says:

Data in the persistent storage is accessed by its address (offset from
the start of the persistent store) and size. Reads can be made from
any location and specified with any size using fl_readStore().

So lest say i have this:

char array[1000] = {1,2,3,4,5};
char tmp[1000];
char readBuff[100];

I could not do something like this?

fl_writeStore(100,sizeof(char) * 1000,array,tmp);

fl_readStore(100,sizeof(char) * 1000,buff);

Am i missing something here?I would only need to read/write chars and char arrays.

[Folknology]

Sure but just be aware that you only have 64K per core for variables, arrays, buffers and code. also that memory access from other cores has to take the form of requests for data across channels in a serialised fashion.

regards
Al

[TazOne]

64K is more than enough for program code and temp storage for computing since i will be reading and writing only one byte per read/write...

Flash will hold 50Mb char arrays I will read one byte do something with it and then write this one byte back.

My theory is that since i will be reading/writing only one byte accsess speed should not be a problem...am I right?

One more question i am going to hook some microSD that has 4GB will i be able to use libflash since i see this in doc's:

int fl_getFlashType()
Returns an enum value for the flash device.
The enumeration of known flash devices is given below.

typedef enum
{
UNKNOWN = 0 ,
ALTERA_EPCS1 ,
ATMEL_AT25DF041A ,
ST_M25PE10 ,
ST_M25PE20 ,
ATMEL_AT25FS010 ,
} fl_FlashId ;

PS

...also that memory access from other cores has to take the form of requests for data across channels in a serialised fashion.

Could you provide me with some doc's/examples regarding this...i am fairly new to all this all all info i can get my hands on will be most helpful!

I will probably have to design the whole schematics from scratch which i don't know much about (yet :) )...this is still research phase but it seams it can be pulled of on XMOS,in theory for now :) .

Thank you!

[Folknology]

The flashlib code is not open and only supports a limited number of flash chips (hopefully this will be opened soon, please Xmos). To use an SD card you would need to either write your own library or use one that others have published, I am sure there are examples of SD card usage from others here, check out the projects and Xmos code examples it's not my main area but I'm sure you will get help with that.

regards
Al

[Folknology]

This thread may be of interest https://www.xcore.com/forum/viewtopic.php?f=14&t=84

regards
Al

[spark]

I am a new programmer of xs1-g4. Can you tell me how to start two devices using XMOSLINK? by modifying the XN files to result in a 8 cores device?