Hi speed port output.

Technical discussions around xCORE processors (e.g. General Purpose (L/G), xCORE-USB, xCORE-Analog, xCORE-XA).
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lilltroll
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Re: Hi speed port output.

Postby lilltroll » Fri Jan 07, 2011 8:42 pm

OK, I solder all other VGA pins to the board including the DDC using I2C. Hopeful I will be able to tell the monitor what I'm trying to do.
The VESA standard is no fun, due to all backward compatibility.

Hoping to get some better answers than 0xFF from the LCD soon.
Probably not the most confused programmer anymore on the XCORE forum.
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Berni
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Postby Berni » Sat Jan 08, 2011 1:13 am

Do you have accesses to a old CRT monitor perhaps? Those will usually try to display it even when its feed a strange timing unlike a that LCD just goes "unsupported input" if the timings aren't familiar to it.

Another way to debug is to put a scope on the VGA output of a PC doing the same resolution and look for differences between your signals.
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Postby lilltroll » Sat Jan 08, 2011 2:54 am

If I get it working I will buy one of those HDMI output chip instead.
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ale500
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Postby ale500 » Sun Jan 09, 2011 12:04 pm

Can you determine the horizontal and vertical sync pulses ? Do they "resemble" normal 800x600 sync pulses ? (You can use the waveform viewer for that)

I do not mean frequency but duty cycle.
At the start of the line you do back porch, then visible part, then front porch and then sync pulse and repeat. (You can start wherever you want as long as you keep the sequence).
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Postby lilltroll » Sun Jan 09, 2011 1:00 pm

I will post some PicoScope pictures if it doesn't pop up.
This is my low-prio project, but after playing with the LCD on the XDK, reading about how they did the magic back in the 80's at 7 MHz, I realised that you can actual do a lot of things as long you skip all bit-baning with few instructions. Small look-up tables gives you a lot of time.
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ale500
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Postby ale500 » Sun Jan 09, 2011 1:48 pm

Do you have any links for "Magic at 7 MHz to share ? :)
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lilltroll
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Postby lilltroll » Sun Jan 09, 2011 6:55 pm

But you have memory for framebuffers and a FPGA to handle the output :o
Your FPGA can handle 1600x1200 @>60 Hz with DDR2 memory. e.g. pixel-rate at 400 MHz.

Well I read about the AMIGA 500 to start with.
Now I have a console output @ 32bit-colours that only takes one thread at 50MHz, and allocates less than 2.9+1.8 kB SRAM, thus I do not even have a line-buffer, it's pixel by pixel. Any other core can send coloured text message to the console for printout and it only allocates one channel-end during the time for the transmission, thereafter it's freed again.

For line-buffers I was inspired by: http://rossum.posterous.com/20131601

Then I started to combine pixel or line-buffers xor frame-buffers to give any programmer using that despite myself a real headache.

My "super"CGA is intended to be much more simple to use!

I will try to update my GIT soon!
Probably not the most confused programmer anymore on the XCORE forum.
ale500
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Postby ale500 » Mon Jan 10, 2011 8:33 am

There is only 512k connected to that FPGA :). I'd use a DVI serializer in the case I want to go that high with the pixel count :). That much memory is enough for 1024x768 at 4 colors. It is mostly a test board, there are a few ideas I want to test out before deciding which platform I want for my LA. Frontend is one thing, the capture units are the other one... Those could benefit from DDR2 but writting in chunks of 8 every time is not very useful... unless two channels are used interleaved I'll have to think about that.

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