Wishlist for architecture

[segher]

I believe that David responded along time ago that instructions can be fitted to adress larger memory-areas,

Some instructions (LDWCPL, LDAP*) use an u20 already; everything with a u16 uses a base
register anyway.

I agree a little with that either you need alot of RAM or you can do it with 64 kB.
Just as an example to play with: If you could buy a L4 with 4x64 kB SRAM or a L2 with 2x256 kB, for the same price, which one would sell best ?

That's not my point. What I'm saying is that you usually (with enough ingenuity) can mold
something that uses e.g. 256kB to use 64kB instead; and it's totally impossible to have
more. I'm saying there aren't many problems for which e.g. 128kB is enough, but 64kB
is not.

Or if we had the choice of a L4 4x64 kB SRAM with a 256 Mbit of RAM of the top, using the on-die hi-speed links directly from the Switch, so all cores could adress the space with hi bandwith, and no output pins were stolen for memory connection.

Please note that it would either be slow or have performance per thread that is not independent
of other threads and CPUs. This means that you can not use it the same way as you can
use the current on-chip memory; you have to use it more as a peripheral device.

[ale500]

External memory has the disadvantage that it is single-port. The SRAM in the Xcore is at least quad-ported. You can supply it using maybe DDR2-800 or so and thus overcome the lack of ports with speed, good luck. But something to consider.... But we still do not know what XMOS has in its sleeve for an upcoming XS2 when it shows up. I hope for some friendlier packages and more SRAM. Flash instead of OTP would also do quite good specially >64kbytes of wide enough and/or quad-ported flash :)

[segher]

External memory has the disadvantage that it is single-port. The SRAM in the Xcore is at least quad-ported.

What makes you think that? Every instruction accesses memory at most once, and instruction
fetch is only done if there is no other memory access.

The on-die SRAM of course can handle 400MHz operation just fine, it's much harder to get
decent bandwidth (or latency!) with external RAM.

I hope for some friendlier packages

Do you mean easier to hand-solder? That's not actually important for the market they are
targetting as far as I can see. But you can hope :-)

Flash instead of OTP would also do quite good

OTP provides some security features as well, you cannot just get rid of it. But sure, flash
on package would be nice.

specially >64kbytes of wide enough and/or quad-ported flash :)

It sounds like you want to run code directly from flash. Flash is way too slow for that though.