Booting and programming an L2

Technical discussions around xCORE processors (e.g. General Purpose (L/G), xCORE-USB, xCORE-Analog, xCORE-XA).
omega7
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Booting and programming an L2

Postby omega7 » Thu Sep 02, 2010 10:24 am

Hi,

Reading the documentation and some posts about this subject, I got a bit of overwhelmed. Hopefully someone's there helping me starting on this subject?

- We want to apply the L2 on a custom board. We only produce a few boards, so some extra components for a jtag is no problem.

- The board will contain an SPI eeprom for holding the program, and must be re-programmable for new updates.

Really straight forward....

My (even straight forward) questions are:

- By jtag, the spi eeprom can just be programmed?
- Do I need extra (boot) code for my situation (using two cores)?
- Taking the size of the xe file, how large should the eeprom be dimensioned? Is there a lot of extra code added?
- Is it possible to store user settings inside the same SPI eeprom or is it wise to do this in another one?
- How should the mode pins be connected? When do I need '10', boot from chanend0?

Looking forward for your suggestions....

martin
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Andy
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Postby Andy » Thu Sep 02, 2010 11:54 am

Hi,
omega7 wrote:- By jtag, the spi eeprom can just be programmed?
If you mean using the XTAG2, yes. There's a utility called 'xflash' which allows you to program compatible SPI flash memories.
omega7 wrote:- Do I need extra (boot) code for my situation (using two cores)?
All you need to do is write a correct .xn file for the L2 which declares 2 L1 nodes, the internal XLinks and the port/package data. All the documentation for that is in the Tools guide pdf.
omega7 wrote:- Taking the size of the xe file, how large should the eeprom be dimensioned? Is there a lot of extra code added?
I wouldn't base the flash size on the size of the .xe file. Most XMOS boards use 4Mbit given that they're so cheap.
omega7 wrote:- Is it possible to store user settings inside the same SPI eeprom or is it wise to do this in another one?

Yep this should be fine.
omega7 wrote:- How should the mode pins be connected? When do I need '10', boot from chanend0?
Mode2 and Mode3 = '11' and Mode4 = '0' for SPI boot. I don't think you'll need the '10' setting, as it only applies when you want to boot over an XLink.
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Woody
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Postby Woody » Fri Sep 03, 2010 9:31 am

A bit of extra information:
Andy wrote:
omega7 wrote:- Do I need extra (boot) code for my situation (using two cores)?
All you need to do is write a correct .xn file for the L2 which declares 2 L1 nodes, the internal XLinks and the port/package data. All the documentation for that is in the Tools guide pdf.
So just to clarify, you don't need to write any of the code to ensure the correct booting. You tell the tools how you want to boot, and the tools produce all the code to boot the system and load your code on it.
Andy wrote:
omega7 wrote:- Taking the size of the xe file, how large should the eeprom be dimensioned? Is there a lot of extra code added?
I wouldn't base the flash size on the size of the .xe file. Most XMOS boards use 4Mbit given that they're so cheap.
It's worth noting that there is 512kbits of RAM in each XCore. Whilst some of it is reused, you probably don't need to have much more than (512kbits) * (the number of cores in the system)
Andy wrote:
omega7 wrote:- How should the mode pins be connected? When do I need '10', boot from chanend0?
Mode2 and Mode3 = '11' and Mode4 = '0' for SPI boot. I don't think you'll need the '10' setting, as it only applies when you want to boot over an XLink.
You will want to boot the master from SPI, then boot the slave down a link from the booted master. (As mentioned above, the tools produce all the code automatically to do this.) So MODE[4:2]=011 as Andy suggests.
omega7
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Postby omega7 » Fri Sep 03, 2010 10:51 am

Hey guys, really great!
I got lost in articles where custom code was needed to program an eeprom. This is the case when you want a connection other than xtag for programming (like usb, rs232) ?
martin
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boeserbaer
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Postby boeserbaer » Fri Sep 03, 2010 9:42 pm

Hi,
I am finishing up firmware on a custom L1-128 based board. The JTAG tools allowed easy board bring up via usb->jtag-2->debug port on my board. I have just managed to get the in system programming part to work, uploading images over some communications channel (RS232 for now) and writing to flash. While it was not entirely straight forward (I never figured out how to use update image without having first written both a "Factory image" and an "Update image" using the JTAG tools), I was able to get the mechanism working in less than a 1/2 day, and it does seem to allow for robust in field upgrade. I tested power removal in the middle of updating an image several times, and the system always recovered to the factory image properly.
So, to re-assure you, the JTAG tools allow you to immediately work with your board. They do allow you to move a bootable image to flash. The custom programming is required to implement in field upgrade using means other than JTAG.

Regards, Mike
omega7
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Postby omega7 » Tue Sep 07, 2010 11:48 am

Thanks Mike!
It clarifies a lot. So, in your case when you want in-field updates by RS232, you have to write a factory image and an update image to the flash once (with the jtag tools) for loading the 'real' program?
From which document did you get this info? I'll read this myself...... interesting stuff.
Regards,
Martin
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boeserbaer
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Postby boeserbaer » Tue Sep 07, 2010 9:38 pm

Tools user guide is the reference document.
I found that the example code in the tools user guide did not work with only a"factory" image installed, so I tried having the jtag tools install both a factory and an update image (really just two copies of my factory image. then the example code worked. I have no problems with flash upgrade over rs-232. It works well, and recovers from failure nicely. I haven't yet started to use the data partition functions but will be very soon.

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