First board design - Power supply

Technical discussions around xCORE processors (e.g. General Purpose (L/G), xCORE-USB, xCORE-Analog, xCORE-XA).
User avatar
boeserbaer
Active Member
Posts: 51
Joined: Fri Jan 29, 2010 4:36 pm

Re: First board design - Power supply

Postby boeserbaer » Fri Aug 20, 2010 6:21 am

Your design might be OK, but rather than driving V1p0 from the 3p3 supply, I would think it better to drive it from the 5V supply. I think your intent is that the V1p0 would not start to ramp until v3p3 is good. I think that your v1p0 switcher can strart before v3p3 is stable. You still need a 3p3 power good signal on the enable to the 1p0 switcher, and once you have that you should run the 1p0 separately. My 2cents. While I have had absolutely no problems from my board, I would have preferred a longer hold off on the v1p0 enable following v3p3 good than the 5us from my adcmp.

Regards Mike
basil4j
Member
Posts: 9
Joined: Tue Aug 17, 2010 11:21 pm

Postby basil4j » Fri Aug 20, 2010 12:40 pm

boeserbaer wrote:Your design might be OK, but rather than driving V1p0 from the 3p3 supply, I would think it better to drive it from the 5V supply. I think your intent is that the V1p0 would not start to ramp until v3p3 is good. I think that your v1p0 switcher can strart before v3p3 is stable. You still need a 3p3 power good signal on the enable to the 1p0 switcher, and once you have that you should run the 1p0 separately. My 2cents. While I have had absolutely no problems from my board, I would have preferred a longer hold off on the v1p0 enable following v3p3 good than the 5us from my adcmp.

Regards Mike
Thanks for the input, its appreciated.

Here is revision 2...
SCHEM.png
You do not have the required permissions to view the files attached to this post.
User avatar
hirestech
Newbie
Posts: 1
Joined: Sat Aug 21, 2010 7:43 am

Postby hirestech » Mon Aug 23, 2010 10:31 am

Hello basil4j,

Your power supply schematic appears to have a pair of errors in that both outputs of U1 (NC7WZ07) are open drain and no pull up resistors appear on this schematic page.

Kevin Halverson
CTO
High Resolution Technologies, LLC
basil4j
Member
Posts: 9
Joined: Tue Aug 17, 2010 11:21 pm

Postby basil4j » Mon Aug 23, 2010 12:45 pm

hirestech wrote:Hello basil4j,

Your power supply schematic appears to have a pair of errors in that both outputs of U1 (NC7WZ07) are open drain and no pull up resistors appear on this schematic page.

Kevin Halverson
CTO
High Resolution Technologies, LLC
Hi Kevin,

Probably should have posted the other page...:) Sorry for the confusion!
Untitled.png
I'm now trying to dig up examples of wiring SDRAM or SRAM to an xmos chip, specifically examples of data rates vs interface type (SPI, parallel etc).

Lots of code around but can't find many comparisons of RAM types on xmos.com, xlinkers or xcore :(

Thanks for the help guys! This is a different beast to the propeller :)
You do not have the required permissions to view the files attached to this post.
User avatar
boeserbaer
Active Member
Posts: 51
Joined: Fri Jan 29, 2010 4:36 pm

Postby boeserbaer » Mon Aug 23, 2010 6:29 pm

The SDRAM reference indicates 50Mbyte/s to 16 bit wide sdram. I have an as yet to be built design using an L1 dedicated to the sdram and avail over xlinks to basically create a pipeline buffer.

Regards mike
vanjast
Member++
Posts: 30
Joined: Sat Jan 16, 2010 9:57 pm

Postby vanjast » Thu Oct 28, 2010 9:06 am

This is what I have planned (to be completed before Xmas :D )

It's a portable XMos based thingy, hence the different battery i/p voltages.
The devices are 2Amp LDO's, and battery voltages are 1V above safe minimum, to reduce heat dissapation in the regulators - Being 2A devices is an overkill, but it should give them longer lifespans.

http://www.vanjast.com/XMOS/Saucer.JPG
:D

Who is online

Users browsing this forum: No registered users and 1 guest