Recommendation for XE232-1024-FB374?

Technical discussions around xCORE processors (e.g. General Purpose (L/G), xCORE-USB, xCORE-Analog, xCORE-XA).
Jack
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Recommendation for XE232-1024-FB374?

Postby Jack » Tue May 30, 2017 10:04 am

Hello Community,

we are planning a design with the large Quad-Tile xCORE-200 CPU XE232-1024-FB374. Does anyone have any experience with this CPU? We are just wondering, if there is any reason to choose 2 separate dual tile xCORE-200 CPUs instead? We are also looking for a Altium Library for this 374 BGA.

Thanks for your help,

Jack
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xsamc
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Postby xsamc » Wed Jun 28, 2017 12:12 pm

Hi Jack,

There are a couple of package choices for the dual tile xCORE-200, and selecting which of these or the quad tile package comes down to the requirements of your project. Some general observations though:
- The XE232 BGA package offers high inter-node bandwidth, with four 5-wire links internally, where as a pair of XE216-512-TQ128s allow for two 5-wire links
- The XE232 BGA package is likely easier to layout than a pair of XE216-512-FB236
- A pair of XE216-512-FB236 will offer the maximum number of I/O

Without knowing the bandwidth and I/O requirements, and the PCB constraints it's hard to offer anything more concrete though.

Cheers,
Sam
Jack
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Postby Jack » Wed Jun 28, 2017 12:36 pm

Hi Sam,

thanks for the feedback.

Our question was aiming more in the direction of is there any known trouble or special challenge with the XE232 374 BGA in HW design. We had the impression, that this variant is not really promoted by XMOS and it is recommended to rather go with versions that are used on XMOS development boards. We also found out, that the small BGA Package seems to violated quite a lot general PCB design rules for 6 Layer designs.

Therefor we were just wondering, if anyone has some HW design experinces with the XE232 374 BGA.

Thanks for your help
Jack
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xsamc
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Postby xsamc » Wed Jun 28, 2017 1:20 pm

Hi Jack,

There should be no problem using the XE232-1024-FB374.
The small BGA will require the use of HDI PCBs to allow microvias or stacked microvias, at the point that you're trying to bring out more than about half of the I/O.

Cheers,
Sam
plex
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Postby plex » Sun Jul 02, 2017 7:39 am

Hi,
I have designed the XEF232-1024-FB374 in a 4 layer PCB with 0.10/0.15mm trace/spacing and 0.45/0.15mm vias using only 2 layers for signal and utilising >90% of the IO pins.
Regards,

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