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A clock frequence can be adjust from 100Mhz to 400Mhz step by 20Mhz?

Posted: Tue Mar 07, 2017 5:36 am
by oayzw
Hi there,
I have no idea for a clock frequence can be adjust from 100Mhz to 400Mhz step by 20Mhz on xCORE-200 eXplorerKIT .

Does eXplorerKIT have to connect any componet /module to generate the clock?

any ideas are welcome!


Thank you very much!

Re: A clock frequence can be adjust from 100Mhz to 400Mhz step by 20Mhz?

Posted: Tue Mar 07, 2017 10:29 am
by xsamc
Hi oayzw,

If you're looking to adjust the system clock, the xCORE-200 Clock Frequency Control document details how to adjust the PLL that drives it.

Section 4 of the above document describes how rapidly the frequency can be stepped while running.

Cheers,
Sam

Re: A clock frequence can be adjust from 100Mhz to 400Mhz step by 20Mhz?

Posted: Wed Mar 08, 2017 5:21 am
by oayzw
HI xsamc,

I read the document carefully after your reply.
The system clock connect pll to other clocks like ref clk and tile clk.
It Means that:
Timing of pins that connected to ref clk will change after pll frequence changed.
i do not expect this.

i mean a pin output a clock that's frequence can be adjust from 100Mhz to 400Mhz step by 20Mhz.
just like a separate configurable pll moudle.

thank you very much!

Re: A clock frequence can be adjust from 100Mhz to 400Mhz step by 20Mhz?

Posted: Wed Mar 08, 2017 10:14 am
by xsamc
Ah sorry, so you want to output a clock on a pin. This won't be easy to achieve on an xCORE, as even if the 500MHz system clock was connected to the port, you could only output at up to 250MHz. The dividers in the clock blocks will not be able to create 20MHz steps either, but you may be able to get around this by also adjusting the PLL settings and rebooting between frequency steps.

This document gives an overview of configuring ports and clock blocks.

Cheers,
Sam

Re: A clock frequence can be adjust from 100Mhz to 400Mhz step by 20Mhz?

Posted: Wed Mar 08, 2017 11:32 am
by oayzw
Hi Sam,

how long does it take for reset to rework ?
Thank you very much!

Re: A clock frequence can be adjust from 100Mhz to 400Mhz step by 20Mhz?

Posted: Wed Mar 08, 2017 1:11 pm
by mon2
Why not use an external PLL and dial up your clock value using I2C ? That would be the best option.

Also, what is the specification of this external clock generator ? You must be very careful of the clock traces at such high speeds. How far away is the device that will use this high speed clock value ?

The PCB, at the very least should be 4 layers and follow high speed digital design rules.

For devices to support this range, you can consider some of the Analog DDS devices (AD9910, etc.) and there are a mix of PLL devices on the market that claim to support these values.

Re: A clock frequence can be adjust from 100Mhz to 400Mhz step by 20Mhz?

Posted: Wed Mar 08, 2017 2:12 pm
by xsamc
The time taken to reboot would depend on the number of xCORE nodes in the system, and the size of the binary (application) which is being booted (as the binary must be read in from SPI flash).

Cheers,
Sam

Re: A clock frequence can be adjust from 100Mhz to 400Mhz step by 20Mhz?

Posted: Thu Mar 09, 2017 2:27 pm
by oayzw
mon2 and Sam,

thank you very much!

Re: A clock frequence can be adjust from 100Mhz to 400Mhz step by 20Mhz?

Posted: Mon Mar 09, 2020 11:12 am
by Schatz143
Hi there!
I do have some issue regarding the clock frequency.
I would like to interface an ADC but the ADC requires a 32MHz clock to be generated by the xcore explorer kit. do i need to buy an
external 32MHz oscillator that will be connected to a 1bit port.
Is there anyway to generate 32MHZ clock and syncronise ?
Thanks

Re: A clock frequence can be adjust from 100Mhz to 400Mhz step by 20Mhz?

Posted: Mon Mar 09, 2020 12:36 pm
by mon2
Yes, the simple solution is to apply a fixed external oscillator at 32 MHz.

A better solution is to add the pre-programmed PLL from Silabs that will generate 3 common clock values. The USB interface demands 24 or 48 MHz to function. This part number was generated by XMOS and is geared for audio projects.

This PLL offers this USB friendly clock on PLL #2 output. Use the 3rd leg of this clock to generate your 32 MHz for your ADC. The source code for configuring over i2c is posted on this forum. Be aware that the 3rd leg should be used so that you do not alter the CPU clock else could have a lock up issue. That is the clocks must be switched without glitches or can lock your code execution. From memory there are 2 internal PLLs in this component. You must not glitch or halt the clock running your CPU.

More details are posted here:

https://www.xcore.com/viewtopic.php?f=37&t=7117

If you never plan to use other than 32mhz then just apply a fixed oscillator in the design. The PLL offers much more flexible options. Search for the Si5351 and StartKit keywords to find the posted I2C master source code in this forum.