Running out of 1 bit ports

Technical discussions around xCORE processors (e.g. General Purpose (L/G), xCORE-USB, xCORE-Analog, xCORE-XA).
DemoniacMilk
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Running out of 1 bit ports

Postby DemoniacMilk » Thu Oct 13, 2016 3:58 pm

I would like to add is I2S (low sampling rate and 1 or 2 channels).

Unfortunately, there are only 2 1-bit-ports on tile 0 on an XE216 device that are not used yet.

As the device is running Gigabit Ethernet on tile 1, I cannot run I2S on tile 1, as there is no core left be used.

Thinking of either using a 4 bit port for I2S (is there anything already programmed for that?) or somehow using a combinable "bridge thread", that allows an I2S interface on tile 0 to access ports on tile 1. My that be possible?
henk
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Postby henk » Thu Oct 13, 2016 6:22 pm

I2S is hard on a 4-bit port, unless it runs in sync with another I2S.

I2C is quite easy on a 4-bit port.

What have you got on your other 1-bit ports?
DemoniacMilk
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Postby DemoniacMilk » Thu Oct 13, 2016 6:30 pm

an interface for SHARC DSPs (3x 1 bit port per data direction) and 2xSPI (2x4 ports)
henk
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Postby henk » Thu Oct 13, 2016 6:56 pm

You cannot share the two SPI interfaces can you? I mean - two chip selects, and the rest ganged up. It will only work if you don't use them simultaneously.

Otherwise - if the I2S is a master-out, then you can overlay BCLK, LRCLK, and DATA on a 4-bit port, and you would just need a one-bit port to input the master clock. You will have to write your own I2S library for that but it isn't that hard - interleave the signals using zip() and push them out with a word containing 8 nibbles. Each nibble will have a clock bit, a data bit, an LRCLK bit, and a '0'. Make sure that subsequent BLK bits are toggled (that generates a clock at half the nibble rate), and make sure that each data bit is repeated once.

That only work with I2S out, and only if you have a 1-bit port for MCLK.

I wouldn't go through tile[1]; too much of a hassle to keep the RGMII timing all good.
DemoniacMilk
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Postby DemoniacMilk » Thu Oct 13, 2016 10:04 pm

I could put SPI in the same pins if i chose to not use libflash, but in that case i dont know how to do the update/image handling that libflash provides.
henk
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Postby henk » Fri Oct 14, 2016 9:37 am

Hi

I see - you are booting from SPI?
If you used QSPI you would use a 4-bit port but gain two one bit ports?

Cheers,
Henk
DemoniacMilk
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Postby DemoniacMilk » Fri Oct 14, 2016 4:39 pm

yes I do boot from SPI. the program for the DSP is stored in the flash as well and will be passed to the DSP by the xcore.
Using a QSPI module might be a good idea, so far I went with our standard Flash IC that we use on most of our designs. When i cam able to free 2 more 1 bit ports that would lead to a total of 4 unused 1-bit ports (lets hope I did not forget any signals!) -> enough for I2S.

I wonder why I did not have the idea myself, haha. Thanks!

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