Pin out in datasheet/Packge Port Map differs Topic is solved

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DemoniacMilk
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Pin out in datasheet/Packge Port Map differs

Post by DemoniacMilk »

While using the eXplorerKIT for some testing, I ran out of accessible 1-bit-ports on tile[0]. I plan on soldering some wires to the pins/ports that arent connected to the pin header, but found some inconsistent info (see attached file).

What document is correct?

Datasheet is 2016/04/20 Document Number: X006991,
The shown table was found in document "xCORE-200-Devices-Package-and-Portmap_2.2", xCORE-200 PORT MAP [X07017]
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Folknology
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Post by Folknology »

Are you getting XOD12 and XOD10 mixed up, as your picture isn't showing an error X0D11 looks right
DemoniacMilk
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Post by DemoniacMilk »

tanks for having a look.

The table lists X0D10 as pin28 (i cut that off), what does fit to the datasheet. But instead of labeling this port as P1C0, it lists X0D11/pin32 as P1C0.
Maybe some part of the table is misplaced by one line?
DemoniacMilk
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Post by DemoniacMilk »

I found out there is no P1E0 in my table. Guess the cells for P1C0 and P1D0 must have been moved down one line by accident.