uart level_test fails (start bit is a glitch)

Technical discussions around xCORE processors (e.g. General Purpose (L/G), xCORE-USB, xCORE-Analog, xCORE-XA).
sprajagopal
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uart level_test fails (start bit is a glitch)

Post by sprajagopal »

Hi,
I am using the following github code for uart.

https://github.com/xcore/sc_uart/blob/m ... rx_impl.xc

I am probing the variable level_test (line 256), and I keep getting level_test = 1, which means the loop skips this iteration. I'm not sure why level_test remains 1 for me. I think this could be because my UART line is in idle high state during this time. But I'm definitely sending data into it. So, what exactly could be happening here?

Thanks,
Prasanna.


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larry
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Post by larry »

What is your sender in this test? Do you have a logic analyzer trace that shows the stop bits?
sprajagopal
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Post by sprajagopal »

I haven't probed the pins through an oscilloscope. But the problem set itself right.
But related to this, sometimes my uart rx server reads 255's when the line is idle. Is this normal? Actually, this is fine as long as the data is read properly but sometimes there are 255s in between the data. My suspicion is that the line stays idle but the server reads 255s at these times.

P.S. I don't have a communications background so I just have some intuitive ideas about comms.
babazaroni
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Post by babazaroni »

Could be the xmos is detecting a glitch on the rx line and thinks a start bit has happened, then clocks in the rest of the data as 0xFF. Maybe add another port read to make sure it's not a glitch.