BPSK demodulator

[Clive]

Hello,

I would like to design a BPSK demodulator similar to the one described in the Zipcores design http://tinyurl.com/ltamcac. My design would use 14 bit two's complement or offset binary input. The sample rate would be 80MSPS. The signal I want the demodulate is 5MHz and the symbol rate is 1.25MHz.

Would this be possible with an XMOS device?

Thanks

Clive

[lilltroll]

Hi

This means that you need to run digital second order IIR filters on XMOS at a sample rate of 80 MHz, am I right ?

[Clive]

Yes, I expect that will be the case.