A little bit confused: Threads, Cores, Processors?

[Mahagon]

Hi XCORE Community,

I'm new to Xmos Microcontrollers and spended a lot of time during the last weeks in reading and trying XCores with my "XK-1A" Board! Seriously: It's fun and im looking forward inventing my first own projects with it!

But actually i have quiet stupid sounding question:

How many Threads can I process a the same time with the par {...} function ?

Let's speak about maybe an XS1-L6 device (six cores on one tile; just for example!).
In my understanding, i can run 6 Threads on that device. But i read today in the XC-Programming Guide on Page 29/65 "[..]Each XS1 device has a limit of eight threads available on each of its processors[...]". So now that means, i can start 6x8=48 parallel threads, right?

I know thats a stupid question, but i read nearly every XMOS architecture PDF File thats available at xmos.com, so maybe im just a bit confused about processor/core-word using in that Files. Or its my bad english :)

So far :)

[Berni]

Yeah this recent marketing decision from Xmos to rename stuff is really confusing to actual engineers. A title is what you know as a core (CPU with its dedicated RAM and such), then what they call a core is what you know as a thread. Each core can run 8 threads(Except these new chips they are launching have less threads) so you can use the par statement to call 8 different subroutines in parallel.(if you try to do too many the compiler will give an error at compile time)

[Bianco]

Hello Mahagon, Welcome to the Xcore community.

The XK-1A can run 8 Threads in parallel.
The upcoming XS1-L6 can run 6 threads in parallel.

The naming conventions have been changed recently as Berni pointed out.
Threads are renamed to (logical) cores or Xcores.
Apparently not all documentation has been updated yet.

To connect things:
A package contains one or more Tiles. Each Tile is a processor (or physical core) having multiple logical cores or Xcores. Each logical core can run a single thread.

[Mahagon]

Good Morning! (here in Europe ;) )

Thank you guys! That's just what i wanted to know :)


Greetings

[Heater]

Which ever idiot came up with this renaming scheme should be fired immediately. It's just a sad marketing ploy that confuses everyone unnecessarily. I'd even go so far as to say it's dishonest. Or at least misrepresentation.

[leon_heller]

This seems to be be the official XMOS description:

http://www.xmos.com/discover/why/how#why-how-cores

[pstnotpd]

This seems to be be the official XMOS description:...

Hmmm, interesting bit for me is the mention of 700Mhz devices.

Anybody know anything about these?

[mikronauts]

Bianco,

Does not the "6 core" version not mean that four "cores" will execute at 1/8th cpu clock, and two at 1/4?

If I am correct, then we can say goodbye to determinism.

Or has the hardware been re-jigged so that each thread will get each sixth clock?

I do like the mention of 700MHz qualified parts...

Btw, I am among the majority that don't like the renaming, it is very confusing to designers.

Hello Mahagon, Welcome to the Xcore community.

The XK-1A can run 8 Threads in parallel.
The upcoming XS1-L6 can run 6 threads in parallel.

The naming conventions have been changed recently as Berni pointed out.
Threads are renamed to (logical) cores or Xcores.
Apparently not all documentation has been updated yet.

To connect things:
A package contains one or more Tiles. Each Tile is a processor (or physical core) having multiple logical cores or Xcores. Each logical core can run a single thread.

[Bianco]

The maximum amount of instruction cycles that each xCORE has available on a processor is always equal:

For n xCores:

For n between 1 and 4 each xCORE gets a maximum of 1/4th of the available instruction cycles.

For n greater than 4 each xCORE gets a maximum of 1/nth of the available instruction cycles (A thread scheduler kicks in which gives each thread a fair share (and only schedules threads that are ready to run of course)).

[JasonWhiteman]

Naming conventions have also confused the purchasing decision. At some point, part number naming convention (to represent core count) changed and thus some documentation used the old convention - some the new. Therefore, some kit part #s would show a different core count for the same part number.

The resulting "noise" generated from this was wasted time and multiple emails to ensure what I was ordering was what was intended. It's important to properly manage documentation changes and think about the support required when changing conventions. Or prepare for the influx of customer support due to the confusion and customer satisfaction issues when something goes wrong due to skew in the documentation.

Although the intent may not be to mislead or misinform, the net result is confusion which does not facilitate a positive experience with the product. Nor does this inspire confidence when problems are found in other areas of an XMOS design.

The intent of my use for XMOS is to build product for business and therefore I need XMOS to succeed. Therefore, all critisism is meant to be constructive. I have also offered product enhancement opportunities for the software platform in my unboxing series.

Thanks in advance to XMOS employees who actively participate in the forums and make meaningful adjustments to the models (software, business, etc) in order to help enhance the experience with XMOS product.

Regards,
Jason Whiteman