Custom XMOS board, Criticism of design needed!

Technical discussions around xCORE processors (e.g. xcore-200 & xcore.ai).
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jonecm
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Post by jonecm »

will do, just anxious to get things off to the fab house asap right now.

I connected both the reset pins from the PLL (RST_N) and the JTAG (TRST_N) together, this shouldn't cause any problems should it?

Dose Mode 2&3 (MSEL) have to be tied to the reset pins for proper function, or can I just float it high (with the help of a 10k resistor) to boot from the spi and then have the JTAG connector ground it when plugged in to boot from JTAG.

If nobody knows I guess I'll just take a gamble with it.

Thanks!
Jon


nisma
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Post by nisma »

You could add a diode on the input Vin.
The dual buffer are wrong. Or you separate the two resets, or you don´t need the buffer at all.
Further if you need jtag only as backup, and no dual buffer you could connect the shutdown_1
instead of RST_N on the jtag connector. At the same time you could connect mode[2:3] to TDI
as example. I know it´s not standard, but with a stapl player it´s not a issue implementing it.
I would add a power led and a led to debug even if you don´t plan to populate it, just in case
you need it.
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jonecm
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Post by jonecm »

Buffers, You must be referring to the Inverter? It is only used to invert the power good reset from the switching regulator as it is Active High and the XMOS needs Active low.
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jonecm
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Post by jonecm »

@Nisma My Apologies to you, I had the wrong component it should have been a inverter but I had just a buffer, That is all fixed now and I'm just using a single channel

Will be sending it to be fabbed tonight
ale500
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Post by ale500 »

I'd add a XTAG-2 connector for programming, if space is a constraint, then I'd suggest letting the 7805 go!.
Schematic You can name the pins on the XMOS processor and on the connector to avoid those crossing connections, I mean the ones at 45° and so on, they really do not look nice.
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