Unused Ports

Technical discussions around xCORE processors (e.g. xcore-200 & xcore.ai).
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Noeldi
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Unused Ports

Post by Noeldi »

How should I configure a unused Port ?
If I don't configure a port I assume it is a floating input Port after reset.
Normally it is not the best for the power consumption if the port is floating.


narutoxela
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Post by narutoxela »

Noeldi wrote:How should I configure a unused Port ?
If I don't configure a port I assume it is a floating input Port after reset.
Normally it is not the best for the power consumption if the port is floating.

For unused ports i suggest setting them to output LOW (off) because i don't know if this happens just to me but when i leave ports unconfigured, the ports are outputting some low voltage of about 2v which can be power consuming... Hope this helps!
wardy
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Post by wardy »

narutoxela wrote:
Noeldi wrote:How should I configure a unused Port ?
If I don't configure a port I assume it is a floating input Port after reset.
Normally it is not the best for the power consumption if the port is floating.

For unused ports i suggest setting them to output LOW (off) because i don't know if this happens just to me but when i leave ports unconfigured, the ports are outputting some low voltage of about 2v which can be power consuming... Hope this helps!

Should this be done in code - is there a need to tie the ports low?
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jai
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Post by jai »

Letting the unsed I/O lines floating will cause the input inveter stage of the CMOS logic to switch between levels.
An increased speed in this switching may lead to current flow to from VCC to GND. This increases power consumption. So we normally keep them at either HIGH or LOW by using PullUp(to keep HIGH) or PullDown(to keep LOW).

You may use 'set_port_pull_down'or 'set_port_pull_up' in XC (include 'xs1.h) and SETC or SETCI in Assembly.
PS: XS1-L series does not have PullUps, they have only PullDowns
wardy
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Post by wardy »

Thank you - So it's no different to the "good ole days"...

This brings me to another question..... Would I be right in thinking it's more power efficient to use pull down resisters and tie it to 0v, than pull up resisters?
MaxFlashrom
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Post by MaxFlashrom »

wardy wrote:Thank you - So it's no different to the "good ole days"...

This brings me to another question..... Would I be right in thinking it's more power efficient to use pull down resisters and tie it to 0v, than pull up resisters?
In general it makes no difference whether one uses pull-up or pull down resistors for unused inputs, in terms of power consumption. A datasheet should list the current into a pin for logic one(IIH) and the current out of a pin (IIL) (marked as a negative current in the datasheet) for logic zero . Sometimes for CMOS, where these currents are of the same magnitude(but different direction), they are listed as II = +-5uA, for example. The current times the resistor value then gives the voltage drop (V=IR), so Vin = VDDIO-(IIH * R) for pull-ups and Vin = IIL*R for pull-downs

One must ensure then that resistor is low enough so that the input voltage, Vin is above VIH min. for pull-ups and below VIL max. for pull-downs. Reasons to choose higher resistors include so as to minimise power consumption when an external pull-up or pull-down is over ridden. High values can also impact signal transition times when capacitive loads(lots of inputs) are not actively driven; this is typically the case when open drain pins are wire-ored with a passive pull up, as in I2C SDA lines. High values may also and decrease EMC immunity. The XMOS datasheets specifies 25pF loading per I/O pin and a passive pull-up has would take 5 RC time constants to rise.

(Incidentally, the Definition of Resistance R=V/I is axiomatic, not empirical and implies no linear relationship between voltage and current. It applies to all materials, including semiconductors, which generally have variable resistance and so don't obey Ohm's Law. It is not Ohm's Law despite what numerous texts will tell you, but that's a battle for another day! Ohmic conductors have a proportional relationship between voltage and current i.e. a constant resistance, by definition, and hence obey Ohm's Law)

Unfortunately the XMOS datasheet makes no mention of IIH,IIL or II. For modern CMOS MOSFETs the leakage current from/to the insulated gate is very low, typically no more than a few micro Amps. The datasheet for the NC7SZ74 specifies Iin = max +-0.1uA at TA = 25 degrees C and max +-1uA at 85 degrees C, to give you some idea.
Inclusion of this data in the XMOS datasheets would be helpful.

If there is an internal pull/up or down internally within the chip that you wish to oppose with an external pull in the opposite direction you will have to use a lower resistor value than you might otherwise have chosen.

The XS1-L1-128 datasheet does list internal pull-ups/downs as having a resistance of 35kOhms, which helps to calculate how to override them, if they are switched on. The XS1-L1 only has internal switchable pull-downs on the I/O lines. IIn can be ignored when calculating how to override these as its effect is negligible.Consider the 35kOhm in series with your external pull-up. This forms a potential divider. The centre voltage must then be above VIH. ie 35000/(35000+R) * VDDIO must be > VIH min.

Regards,
Max
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jon_ferg
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Post by jon_ferg »

Hello all,

Regarding unused ports. If a port is unused and by that I mean not declared in your XC it will be defaulted to be a input with the pull enabled. Down for XS1-L (except a single pin Port8D7/Port16D15 which is up) and up for XS1-G.

If the port is declared in your and is unused you can set it has input and use set_port_pull_down for XS1-L or set_port_pull_up for XS1-G.

Regards, Jon
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Folknology
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Post by Folknology »

Regarding unused ports. If a port is unused and by that I mean not declared in your XC it will be defaulted to be a input with the pull enabled. Down for XS1-L (except a single pin Port8D7/Port16D15 which is up) and up for XS1-G.
OK you got me curious why is Port8D7/Port16D15 different from the other ports on the XS1-L?

regards
Al
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