XMOS audio channel limit 48 channels at 176.4 kHz

Technical discussions around xCORE processors (e.g. xcore-200 & xcore.ai).
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jsaksris
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XMOS audio channel limit 48 channels at 176.4 kHz

Post by jsaksris »

For XCORE 200 is it capable of 16 bits 48 channels at 176.4Khz?
Which is within UAC2 limit.

Has anyone looked into this?
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Caleb
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Post by Caleb »

I've been planning to do some experiments with the more recent extension to UAC2 that allows larger maximum data packet. I was only aware of it because our friend at Apple told us about OSX support for it. But I don't have the spec. I think he said that this is a feature that is associated with USB 3 spec but is also and update to UAC2.
The document that you took that table from is here:
https://www.xmos.com/file/why-do-you-ne ... o-class-2/

This doc. glosses over that distinction somewhat, refers it to as "UAC2 high BW". It refers to a max data rate of 196.6Mb/s. which is 3X the UAC2 HS max data rate.
At that data rate, you have only about 20 instruction cycles / 32-bit PCM sample on a 125MHz XMOS core. I would expect that the maximum throughput of the existing UAC2 reference software is much lower. I think that somewhere in the documentation you'll find benchmarks for each of the cores in the system. But there is probably some room for optimization.

What application would be able to consume or produce 48 channels in/out of the XMOS? To interface to an external device, you could use a bit clock frequency of 45.1584 MHz and then you could encode 16 channels of TDM 16-bit PCM samples on 3 port pins. Perhaps more likely would be TDM 32-bit PCM samples (for 6X 8-channel DACs), requiring 6 port pins for data. 16-bit 176.4kHz PCM data seems to be an unusual format.
jsaksris wrote: Mon Mar 23, 2020 10:25 am For XCORE 200 is it capable of 16 bits 48 channels at 176.4Khz?
Which is within UAC2 limit.

Has anyone looked into this?
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