Driving RST pin

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Dmil
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Driving RST pin

Post by Dmil »

Previous versions of MPU documentations had Errata section and it said:
"To guarantee a logic low is seen on the pins RST_N, TRST_N, TMS, and TDI, the
driving circuit should present an impedance of less than 100ohm to ground. Usually
this is not a problem for CMOS drivers driving single inputs. If one or more of these
inputs are placed in parallel, however, additional logic buffers may be required to
guarantee correct operation."

Evaluation board uses NC7WZ07P6x with power open collector output to drive RST input.

I don't see an Errata section in the new MPU manual.
It is possible to use a common low power logic IC to drive this input now?
It is possible to replace NC7WZ07P6x with a common 2AND logic IC?


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mon2
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Post by mon2 »

You will want to use an open drain (aka open collector) buffer for this RST_N & TRST_N function so that you can OR the same output with an external XTAG tool. That is, multiple drivers can be connected together at the output pin but ONLY if the buffers are open drain.

For this reason, the use of push-pull style of buffers are not recommended.

Using OD buffers, the high is defined using a local pull-up resistor but any of the OD buffers can pull the line LOW. No harm done since there is "no high" from the buffer. Rather OD buffers enter high impedance mode when the input is HIGH.

The ONSEMI part is one of many options you can use here. Just be sure the buffer is open drain. For example, we find that Diodes Inc. is often the lowest cost solution.

Sounds like you are designing a custom board. If available, consider to post the XMOS and related support schematic for a final review before submitting to your PCB shop. For example, if using USB, do apply ESD protection + impedance controlled traces + in-rush current protection on Vbus for best results. Many users have faced field damage upon docking without such protection. Also, the power supply rails must supply ample current and be properly sequenced before the the RST_N line is released else can face glitched power up / lock ups, etc.

Do pay attention to the center belly pad (if present on your package) for soldering else face the wrath of the XTAG tool not working correctly with your device. Each XMOS datasheet offers a checklist so must be reviewed and do scout for other suggestions on this user forum.

Hope this helps.
Dmil
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Post by Dmil »

RST_N input of MPU is driven by function (TRST_N & POR_N).
Why a push-pull output is not recommended?
I don't see any reason of using OD except of the high output current.
It was a special recommendation in one of the old doc.

P.S.
It is refactoring our working custom board.
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mon2
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Post by mon2 »

You cannot tie to outputs together if the outputs are push-pull style. Take the case where if one output is LOW while the other output is HIGH. This will be a conflict and harmful to both such logic gates. Recommend to bread board with some spare chips to test the outcome of such a configuration. Who will win on this logic gate fight?

If you are 100% sure that only a single gate will be driving the RST_N & TRST_N pins then it is ok to consider a push-pull style of buffer or gate. Believe that RST_N and TRST_N are tied together on the XMOS CPU designs and these are inputs. If you decide to use push-pull style of gates to drive these reset pins then you CANNOT also use the XTAG tool with your board.

A common open drain buffer to use is the 74HC07 series, etc. and they should be also available in single gate packages.
Dmil
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Post by Dmil »

"Who will win on this logic gate fight?"

What a fight? It is just AND logic, POR_N & XRST_N = RST_N.

I am asking about driving RST_N pin.
I've found the old doc, v1.6:

I Schematics Design Check List
I.3 Power on reset
The RST_N and TRST_N pins are asserted (low) during or after power
up. The device is not used until these resets have taken place.
As the errata in the datasheets show, the internal pull-ups on these two
pins can occasionally provide stronger than normal pull-up currents.
For this reason, an RC type reset circuit is discouraged as behavior
would be unpredictable. A voltage supervisor type reset device is
recommended to guarantee a good reset. This also has the benefit of
resetting the system should the relevant supply go out of specification.

"these two pins can occasionally provide stronger than normal pull-up currents."
So, the board uses OD IC to give that high current.

I don't see that chapter in the new doc.
Is the problem fixed?
Last edited by Dmil on Thu Feb 22, 2018 7:08 pm, edited 1 time in total.
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mon2
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Post by mon2 »

You still need to apply an OD buffer for these pins and offer a local pull-up to define the "high" state. These pins will be driven through the OD buffer by a Reset Supervisor - just like all of the reference XMOS designs to date. If this detail is missing from the related document then the document is likely stale.
Dmil
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Post by Dmil »

Thank you!
v1.14 doesn't have this text.
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