USB Audio Ref. Design: L and R channel on different ports

[danielone]

Hi All and merry xmos xmas lol

My project requires two mono PCM1704 DAC. The L/R clock is substituted with a latch enable like a common SPI device. This is the data format and timing requirements of PCM1704.

Screen Shot 2014-11-19 at 23.35.03.png

At the beginning I thought to use some discrete latch registers in order to separate L and R data from the native I2S xmos output, then I decided to implement the data separation directly in the stack. So I dropped the S/PDIF port I do not need and used it for the left channel.

I am not so much experienced in programming, so I followed an "intuitive" process. Basically I tried the same way used in the DSD part of the code that, in fact, generates L and R data simultaneously on two different ports. Please look at the relevant module in attachment.

L/R clock is changed to a latch enable.

I think I reached the goal but a strange thing occurs. Every x samples a long silence (sequence of zeros) occurs. I broke my head on this but I did not find any clue. Please look at the signals below. Can you kindly help?

testdac.jpg

audio.xc

Aside of audio.xc other modifications has been made, obviously, in main.xc (assigning to audio_tile the new output port for the left channel) and in audioports.c, .xc and .h and in the .xn file with port aliases names.

Many thanks!

Dan

[danielone]

Hi,

I made a further step this evening. Please look at the relevant file. Now I have to transform the L/R clock in a latch enable. I would be grateful if you could give me an input :)

audio.xc

ok.jpg

[dweeb4]

Hi Dan,
I'm looking to do exactly the same thing as you but I have only just started to look at this & it will take me a while to get up to speed & then hopefully, I can share & help?. I'm going to find the DSD code first.

Have you progressed this further?

It's a bit disappointing that no one answered your posts, I doubt no one has done this?

John