XMOS Ports Puzzle me - any help?

[Interactive_Matter]

Hi,

I recently began some real world XMOS programming. But getting Ports to work is quite cumbersom to me.

I have a real hard time to translate between the manual and the programming and the complier output.

I know the ports are named XS?_PORT_?? like XS1_PORT_1A

But this port is not bound to a certain core. At least that is what the complier tells me:

Warning: Port "test" is not placed on specific core (support may later be deprecated).

Do I have to edit the platfomr.xn? Or how do I specify the core? When will this be deprecated?

The hardware manual has some table saying Pin this and that is wired to port this and that of core X (this big one paged table after explaining the expansion ports) and in the third column there is something like 'X1PortA' - what is this?

If I ignore the warning and place the program on the right core - with a main par{on stdcore[] ...}} statement it works. When will it be deprecated?

Can I use ports with the same name on different cores (e.g. if I want to use the same protocol on some expansion ports and write a program which works like allways using PORT_1A - and hoping to be on the right core). I am owning a XC2 and want to drive the same protocol on all 6 expansion ports. So that would be ok for me.

And if you are puzzled because of the names: I am currently testing on an XC1A board.

Thanks

Marcus

[Bianco]

Hi,

I recently began some real world XMOS programming. But getting Ports to work is quite cumbersom to me.

I have a real hard time to translate between the manual and the programming and the complier output.

I know the ports are named XS?_PORT_?? like XS1_PORT_1A

But this port is not bound to a certain core. At least that is what the complier tells me:

Warning: Port "test" is not placed on specific core (support may later be deprecated).
in XC you have to define ports as globals. Each core on the G4 chip you use has exactly the same ports so you have to verbosely define what core the port is located. If you don't and get this warning it will assume core 0.

Do I have to edit the platfomr.xn? Or how do I specify the core? When will this be deprecated?

No you don't have to edit the XN file.

on stdcore[0] : out port myport_core0 = XS1_PORT_1A;
on stdcore[1] : out port myport_core1 = XS1_PORT_1A;


The hardware manual has some table saying Pin this and that is wired to port this and that of core X (this big one paged table after explaining the expansion ports) and in the third column there is something like 'X1PortA' - what is this?
These are just names for the extension ports on the XC-1A boards. It has nothing to do with the chip itself except that the number after X indicates the core number on which the IO pins are located.

If I ignore the warning and place the program on the right core - with a main par{on stdcore[] ...}} statement it works. When will it be deprecated?

Can I use ports with the same name on different cores (e.g. if I want to use the same protocol on some expansion ports and write a program which works like allways using PORT_1A - and hoping to be on the right core). I am owning a XC2 and want to drive the same protocol on all 6 expansion ports. So that would be ok for me.
See my above example. You can also run multiple of the same protocols on the same core when you have the necessary port and thread resources. You can write the code once and pass the ports as arguments to the threads.

And if you are puzzled because of the names: I am currently testing on an XC1A board.

Thanks

Marcus