sample first custom SPI interface

Technical questions regarding the xTIMEcomposer, xSOFTip Explorer and Programming with XMOS.
pasau
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Joined: Fri Dec 06, 2013 7:05 pm

sample first custom SPI interface

Postby pasau » Tue Jul 29, 2014 12:46 am

Hi, i am wondering if anyone here has already experienced this problem. I am making a synchronous bit banging custom SPI interface, i.e. in master mode, i clock the SPI clock for an arbitrary amount of cycles, while in slave mode i input or output data based on this clock.

The problem comes when i want to do sampling on the first clock edge (typically SPI modes 0 and 2), rather then drive on the first clock edge. If the clock being idle is at high(polarity=1), then the master expects the slave to sample on the first falling edge, so the data has to be ready half a clock cycle before. So if i implement this using a buffered port that is clocked with the SPI clock, i get the problem that the port needs a rising edge to output data, but it only comes after the first falling edge so the first bit sampled is not good. Is there a way to bypass the buffered port and write directly to the pin? In the SPI stack they seem to be doing something like closing, reconfiguring and reopening the port so they can output a first value, but that whole process makes the SPI modes 0 and 2 being way too slow.

In slave mode, similar problem when outputting, since the first edge is a sampling edge, the slave will never be allowed to drive the first bit.

Any thoughts, suggestions about this? Thank you!
pasau
Experienced Member
Posts: 72
Joined: Fri Dec 06, 2013 7:05 pm

Postby pasau » Tue Jul 29, 2014 9:31 pm

hi, sorry if my question wasn't very clear i will try to rephrase that, as i was able to further pinpoint my problem.

Is there a way i can use an output buffered port in a way that when i output a value, the first bit is already available for sampling on the pin (already driven). What i want is that the first driving clock edge drives the second bit. That would be useful for cases where the sampling edge comes before the driving edge.
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mon2
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Joined: Thu Jun 10, 2010 11:43 am

Postby mon2 » Fri Aug 08, 2014 2:43 am

Hi pasau. Have you seen the XMOS SPI Component ? It supports MASTER and SLAVE SPI modes.

Reference:

https://www.xmos.com/node/15422?page=0


Please review the following library function. It may help your case.

Reference:

https://www.xmos.com/xs1-library?secure ... mple_delay

void set_port_sample_delay(void port p)

Sets a port to sample delay mode.

This causes the port to sample input data on the falling edge of its clock.

Kumar
Dominik.vettel
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Joined: Wed Nov 28, 2018 9:31 am

Postby Dominik.vettel » Thu Feb 27, 2020 6:47 am

Hi there!
I would like to connect external BMA accelerometer to xcore 200 explorer kit through SPI interface.
Can I get some suggestions?
There is accelerometer example for the kit. But how to interface BMA accelerometer? Thank you
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mon2
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Posts: 1679
Joined: Thu Jun 10, 2010 11:43 am

Postby mon2 » Fri Feb 28, 2020 5:16 am

@Dominik.vettel, review the IP to allow for the XMOS CPU to become a SPI MASTER. Then proceed to send out your commands over the SPI interface to your BMA accelerometer. From Bosch, believe the component offers I2C and SPI interfaces? If yes, you could very easily follow the existing support code for the XCORE-200 explorer kit and the onboard accelerometer and tweak to suit your exact model.

If SPI interface, review the attached document on how to build & test a SPI Master.

Using this IP, start with pinging the target component and request perhaps the ID of the part. Then expand your code to suit.

AN00160_-How-to-use-the-SPI-library-as-SPI-master_1.0.1rc1.pdf
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