Search found 34 matches

by lorenzochiesi
Mon Oct 02, 2023 9:01 pm
Forum: General Questions
Topic: AES67 supporting
Replies: 3
Views: 17415

Re: AES67 supporting

Im still interested...do you have a working solution?
by lorenzochiesi
Tue Feb 09, 2021 4:35 pm
Forum: Other Applications
Topic: Issues with KSZ9031RNX
Replies: 6
Views: 12395

Re: Issues with KSZ9031RNX

Hi lebodnar, Many thanks, you pointed me finally in the right direction! Issue was caused by bit-strap PU on RXCLK line! Was not a question of clock signal distortion but a mistery dependent on XMOS RGMII receiver block... XMOS datasheet in RGMII section states: "The RGMII PHY should be configu...
by lorenzochiesi
Tue Dec 15, 2020 12:07 pm
Forum: Other Applications
Topic: Issues with KSZ9031RNX
Replies: 6
Views: 12395

Re: Issues with KSZ9031RNX

Thanks for your answer CousinItt, I know both document, however I found hardware checklist only after have designed the PCB :-( Main difference between my design and hardware design checklist is in missing series permination resistor on RGMII data (I have only on TX and RX clock) Do you have series ...
by lorenzochiesi
Mon Dec 14, 2020 3:06 pm
Forum: Other Applications
Topic: Issues with KSZ9031RNX
Replies: 6
Views: 12395

Issues with KSZ9031RNX

Hi All, I'm designed a board were KSZ9031RNX ethernet PHY was used in replacement of AR8035. Our design worked smootly at 100Mbit rate but won't work reliably at Gibgabit rate! In particular with a simple TCPIP stack including only an ICMP server on the XMOS we lost about 40% of ping from a directly...
by lorenzochiesi
Thu Oct 08, 2020 10:44 am
Forum: Development Tools and Programming
Topic: Assertion failed: "vsnprintf failed"
Replies: 5
Views: 2160

Re: Assertion failed: "vsnprintf failed"

Hi Nick, I don't think that "LinkerErrorHandler.cpp" is a temporary file created during the building/linking process on your computer. It looks to me most likely be a source file of the linker itself, thus why you are not finding it on your computer. Thus looks like this error come from an...
by lorenzochiesi
Tue Feb 18, 2020 6:36 am
Forum: Other XMOS Development Kits
Topic: XMOS XEF232 CPU SOM
Replies: 5
Views: 9706

Re: XMOS XEF232 CPU SOM

Hello Kumar,
Which is the state of the SoM project?
I'm currently very interested in similar device for low volume production of a new design.
Lorenzo
by lorenzochiesi
Tue Jan 21, 2020 3:16 pm
Forum: Projects
Topic: Microchip KSZ9477 AVB Switch IC
Replies: 13
Views: 42206

Re: Microchip KSZ9477 AVB Switch IC

Hi Akp, Easiest way is accessing phisical ARM UART. Probably is the only way considering that "ps" command don't show any ssh or telnet daemon Following link let you download a zip with couple of hi-res picture with indication of UART pin. You will also find log of useful console command a...
by lorenzochiesi
Tue Nov 26, 2019 12:38 pm
Forum: Introductions!
Topic: AVB 32 in, 32 out to TDM design support
Replies: 7
Views: 10265

Re: AVB 32 in, 32 out to TDM design support

Hi raimonds, Maybe is possible but I'll not advise for 2 reason: - In my experience push XMOS core (at least the one dealing with TDM16) near limit could result in fuzzy result not easy to debug - TDM16 @48kHz is very delicate signal to deal on PCB...I'll not suggest unless is absolutely necessary Y...
by lorenzochiesi
Mon Nov 25, 2019 3:02 pm
Forum: Introductions!
Topic: AVB 32 in, 32 out to TDM design support
Replies: 7
Views: 10265

Re: AVB 32 in, 32 out to TDM design support

Forwardfing PM: Hi lorenzochiesi, How are your success in 32/32 TDM project mentioned here https://www.xcore.com/viewtopic.php?t=4835 ? Raimonds Answer: Hi Raimonds, The post you are linking was about 32/32 I/O channel on I2S interface. I2S is a special definition (better specified) of a more genera...
by lorenzochiesi
Tue May 07, 2019 1:02 pm
Forum: Other XMOS Development Kits
Topic: Connecting Two xCORE-200 explorerKIT Using xTAG and xCONNECT
Replies: 10
Views: 20860

Re: Connecting Two xCORE-200 explorerKIT Using xTAG and xCONNECT

Hi All, Exist any way to connect 2 x xC200 MC-Audio 2V0 Developement kit? Is is possible to link the CPU using only XLUP0/1 and XLDN0/1 from xSYS connector? Maybe renouncing to xSCOPE functionalities and using only JTAG for programming/Debugging? I'm struggling on xCONNEDCT and xLINK documentation b...